cnvogel

> 4K 4096 / 2160 = 1.8962962962962964

What most people call "4k" is 3840:2160 (typical 16:9 = 1.77… aspect ratio). At least that's the amount of pixels in most TVs/Monitors I've seen.

Slides: https://github.com/takeshixx/woolim-tools

Blog-Post: https://insinuator.net/2016/12/woolim-lifting-the-fog-on-dpr...

If I remember the talk correctly, then yes. But it was said that there are several distinct firmwares…

GPS is indeed happily unaware of leap seconds, it started counting seconds on January 6th, 1980 (UTC) {1 week is 604800s, weeks count 0..1023, there already was one rollover}.

http://imgur.com/a/uq6D0

A few minutes ago, when the screenshot was taken, this was second #501074 in week #1928.

As a courtesy to users, GPS transmits the current number of leap-seconds inserted in UTC (currently: 17) and the fact that a leap-second will be inserted the next occasion (end of this year: "LEAP PENDING!"). That's of course very helpful when you are using GPS disciplined clocks for timekeeping.

This is not strictly true. You can reproduce a band-limited signal as long as the bandwidth of this signal is smaller than half the sampling frequency.

For example, a signal that only has energy in the range of 9MHz to 11MHz has a center frequency of 10MHz, but a Bandwidth of 2 MHz. You could sample, and reconstruct, the signal perfectly with a sample-rate higher than 4 MHz. Any content between DC and 9MHz that would be present would distort the sampled waveform, though, and create artifacts.

https://en.wikipedia.org/wiki/Undersampling

Of course, nowadays most often one just uses a very fast ADC, and one can then choose a suitable sub-band by decimation (in a FPGA or ASIC), a kind of digital frequency filtering.

Undersampling was often used in older RF gear (and, maybe it still is for reaching the hightest frequencies? I don't know what's the current state of the art).

You forgot to quote the funniest part...

"This is already logistically a masterpiece," quotes the "Kölner Stadt-Anzeiger" the judge from the process. "You did not have anything else to do this day." The accused replied, "I've put a radio on the line because I was too bored."

„Das ist ja schon logistisch eine Meisterleistung“, zitiert die Zeitung den Richter. Der 37-Jährige habe den ganzen Tag nichts anderes gemacht, als den Automaten zu befüllen. Der Angeklagte antwortete demnach: „Ich habe ein Radio danebengestellt, weil es mir sonst zu langweilig war.“

People seem to be under the impression that regulation inevitably means "someone has to review/audit every single change that was made to any aspect of a product". But in practice there can be all kinds of provisions, from the weak to the strong.

A weak provision may be that at least a minimum of development and testing has to take place, with requirements on record-keeping and naming of responsible persons: For a simple device, or a simple software, this might take the form of a checklist or a questionnaire which you have to take before uploading code to the App-Store.

Yes, this seems very straightforward to fake, but at least then you have deliberately cheated a system designed to catch errors, and not "just written shitty code" (or built a flimsy mechanical device... when applying this scheme to non-software world). Which, I think, would already help a lot to make people accountable for their products/inventions/...

{for, example: with CE certifications, you, as a producer only state that you have built your products according to some harmonized standards, but the conformance itself is not tested by a third party}

With increasing security/privacy requirements, the mandated measures can could then be ramped up. Maybe scaled by permissions of an application (accesses otherwise protected data?), the ability to process sensitive date or maybe number of users?

The extremes measure would be a full line-by-line review on every change, when software is life-sustaining or a fault may have catastrophic (death of people, like running a pacemaker or steering a huge plane).

The full movie can be watched on the website of the BPB[x]: http://www.bpb.de/mediathek/225092/master-of-the-universe

I really like the style that the main/only actor/narrator is filmed in an abandoned former bank's office buildung.

[x] The Federal Agency for Civic Education, FACE (German: Bundeszentrale für politische Bildung, bpb) is a German federal government agency responsible for promoting civic education.

For comparison, this is how FMS (flight management system) updates are done on contemporary aircraft: WiFi from iPhone, USB or SD-Card.

https://aerospace.honeywell.com/en/products/cockpit-systems/...

From the datasheet/pdf: Low-cost USB media can be used on your personal computer to download the latest navigation database from the Internet.

> choosing a microcontroller which uses the logic level you need is a perfectly acceptable solution.

Absolutely!

Interestingly, by 14 CFR 43.3(k) even the "official" method described in the article is noncompliant, as the device is removed from the aircraft, and put into a docking-station at home, loaded via RS232.

I also understand the need to follow procedures, even if there are cases in which they are clearly nonsensical or obviously without influence on air safety -- just because it's not guaranteed that everything that seems to have no influence on safety actually does have no influence on safety.

But: I had seen photographs of an old floppy drive in a B737 (I think) which was used to load updates to the FMS. Then there's a version with USB. Both storage devices could be inserted into a PC, with junk stored on them, or swapped with a completely unrelated disk/usb-stick. Inadvertently, or even with malicious intent.

So the risk of arbitrary data on the floppy drive must have been mitigated (by signing the FMS updates, checksums, ...) and considered acceptable during the design of the system.

The same, I think, should hold true for the memory card in the article: If traditionally these cards had been shipped around by postal mail, I'll claim that the possibility of damage which isn't visually apparent must have been taken into account, and a procedure been put into place, such as a CRC check to be performed after the swap, or a self-test after every turn-on of the unit. Afterwards, the card should be considered "good", independent of the method by which the data was loaded.

Does that make sense, or am I overseeing something obviously here?

If you go to the effort to make a nice circuit board, and need to interface 3.3v to 5v logic it doesn't really pay off to skimp on, e.g. a proper voltage translator. [e.g. SN74LVC4245]

Why? Because it's giving you worse results: Slew time with open-collector/pullup signals is pretty bad because of the 0->1 transision the trace capacitance is charged up via the pullup rather slowly (compared to a proper CMOS driver). Also, for 8 signals you'll need to populate 8 resistors, 8 clamping zeners. Needs more space than a single SOIC-20, which provides you with proper bidirectional drivers.

In this special case, though, the inputs of the NOR flashes seem to be happy to be driven by 3.3V, the datasheet requires Vinh (voltage input high) to be >2V (likely to be compatible with old TTL logic which had this threshold voltage). So all inputs to the NOR flash could be directly connected to a 3v3 microcontroller, leaves only the 8 bidirectional data pins and the "Ready" pin RY/BY#.

So, I'd probably take a bidirectional level shifter for the data bus, skimp on the single "Ready" pin and only use a resistors, as this signal is only interesting during erase anyway. Then everything else could be directly connected to any 3.3v compatible microprocessor.

That way all signals that need to be fast are fast, there's a minimized component count, and the single remaining signal would be for me to be ridiculed for my lack of rigor :-).

No, you don't have to switch "Master" and "Device" mode (what does that even mean in PCIe?).

You might be surprised to hear that your networking card, the AHCI-SATA interface and even the sound-card soldered onto your computer's mainboard is allowed to, and does, read from and write to your computers memory whenever you are using it. {that's just where I had to dig in, in the past, almost any modern peripheral uses DMA}

If the operating system needs a block from your harddisk to be read, and stored in a certain memory location it will actually tell the physical memory location to the AHCI controller and tell it to write the contents into memory, on it's own. It will signal an interrupt when it has finished transfering the data.

Your networking card will have "ring descriptors" which tell the card a list of buffers (in RAM) into which to save new incoming packets. It will raise an interrupt after it has finished writing to the first buffer.

Your sound-card will likewise have a list of buffers from which it reads, and to which it writes just as you are listening to mp3s, or having a phone conversation with google hangouts.

The worst offender would probably be Firewire which, if not configured to block this (modern OSes do), allows these reads from/writes to memory triggered by any connected external device, and from/to addresses supplied by this external device. It can be a huge help for debugging, though.

On typical computers, there's no safeguard against this happening. But some have a IOMMU which can be used to limit DMA and redirect DMA accesses with respect to physical memory.

45° rotation make sense when you want to avoid having half of your traces exit a dense chip towards the board edges, assuming (which often is the case) a rectangular board.

I guess in this particular case, the (many, and sensitive to total length and relative length with respect to each other) traces connecting CPU and RAM had been routed in isolation first. These chips seem to be 45° rotates against each other.

Then the group of CPU & RAM had been rotated too leave enough space for power/camera/HDMI, I'd guess.

It looks strange, but frankly there is no real reason (besides aesthetics) to favor any particular orientation.

http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.g... load_elf_binary()

maps the executable to memory, and if an elf interpreter (/lib/ld-linux.so) is specified (which it normally is) also the elf interpreter.

It then jumps to the entry point of the raw binary or of the elf interpreter.

Is it just me, or does $19M sound ridiculously low for building a prototype of a military vessel?

Most larger yachts that are built for rich people seems to cost around this ballpark, and for them I would expect that no new technology has to be integrated from scratch, in to the core design (as in: motors, geometry of the hull). Exceptionally ugly boats, like Venus built for the late Steve Jobs claim to cost $100M!.

With a innovative new concept, I expect a lot of individual systems to be prototyped, scrapped, reworked. Let alone the effort needed for designing this thing. This is a startup with 20 People (17 of them now being layed off) operating for several years building a SHIP.

Anyone having numbers for typical effort/money/time/headcount spent in designing and building novel boats?

> But in the future, is it worth assigning the IP to a > foreign holding corporation

But this would make the US-American individual coming up with the ideas (the "intellectual property") export it to a foreign nation. Which is exactly what currently seems to be prohibited by putting a secrecy order on the patents.

> They can't order an Icelandic company to do anything, > even if it happens to have American shareholders.

This company then better not employ any American engineers.

The program counter will not typically be compared via JTAG (this would be way too slow) but there will be dedicated registers inside the CPU that are compared against the program counter.

For AVR specifically, have a look at e.g. https://github.com/raimue/avarice/blob/master/src/jtagbp.cc (just random find on github, likely not the official repository).

This is, by the way, also possible on a typical PC (as in "personal computer" not program counter), also x86/64 has debug registers.

http://www.codeproject.com/Articles/28071/Toggle-hardware-da...

...and very likely also on ARM, m68k, MIPS, Sparc, PPC, ... I just didn't look it up.

…there is ”Micropython“…

But I've seen many old and even ancient computers where only –you guessed it– the (CMOS memory/clock) batteries went bad. Basically all of them go dead after a few decades, exchange them for new ones, and the puppy will boot up again.

For more modern devices: I'm now on my third battery of my private notebook (6 year old HP Probook), third battery on a Galaxy SII (!) which still is OK for random tests and to leave around as a music player even running Android 6.0(!). If I had to send them to a shop to have the (internal, glued down) battery exchanged, I would have stopped using both devices already a few years ago.

But just buying the battery for a few (few 10) bucks is cheap enough to risk the investment in an otherwise paid off machine.

I don't think the same holds true for more involved repairs where a mobile phone made of (a few hundred million…) discrete and easily repairable transistors would be handy ;-).

Yes, this is stupid. But many voters will be attracted by simplistic statements.

And as a factory worker you are likely much more scared of having to leave your job and learn something completely new… compared to, e.g. the random HN reading IT freelancer.

So the stupid sentence, I'm sure, will resonate well with many citizens (unfortunately).

Of course, there better approach would be to show the potential benefits and job opportunities. But why put in the effort of simple fear-mongering will do?

Yes, maybe you even burn more fossil fuel because of transmission loss. But one might still gain on better filtering of dust/particulates in the exhaust which is a major problem in German inner cities.

(I'm not advocating the use of coal energy to power electric cars, just mentioning that there are more aspects.)

If you don't know most of the things mentioned, but are interested what all of it means...:

I recommend some of the talks of Harald which consist (by neccessity, he's a great speaker) mostly of acronyms, and he's explaining most of it (within the limits of time imposed by the talk).

e.g. https://media.ccc.de/v/32c3-7412-running_your_own_3g_3_5g_ne...

(edit: typo)

It probably could work of one assumes two equally smart devices on both ends, but USB always included shortcuts to allow the cheapest and flimsiest implementation (add a resistor between two pins) by garage shops building Phone chargers for 30¢/piece. And for them, its easy to mess around randomly, until their nonstandard non compliant junk means who-knows-what to a USB-C device.

So, your $300 headphones will pretty certainly work with your $800 iPhone, but plugging them into that $3 (including shipping) charger?

> I'd bet the Commodore hardware ports are all > available and can be hooked up to emulators just fine.

You are aware that the C64 expansion port is actually the 6510-CPUs address and data-bus?

To properly emulate this cycle accurate in an emulator you'd have to attach about 30 I/O pins to your PC which you can update at a rate of 1MHz, with basically no latency between reads and writes, to connect external circuitry.

That's a brilliant idea, I almost forgot about this. When I installed networking gear in the 90s, common knowledge/best practice was to always fix duplex/link-speed on fixed installed gear (routers/switches) because they frequently messed up autonegotiation.

Try a managed switch where you can choose 10/100, Full/Half and see statistics. Also try to get a "netstat/ifstat" like display on the logic analyzer to see bad packets/collisions/...

Probably out of fear that the signals might deteriorate with probes attached.

But with a modern-ish logic-analyzer and the ancient original hardware (huge voltage swings, slow clock, very long busses), I doubt that the probes would make a discernible difference, would they?

So… only speedup the clock while the software under test is sleeping (waiting on a muted, timer,…) . Stealthy software shouldnt have excessive cpu consumption, otherwise people will investigate.

It's obviously a cat & mouse game.

There are cases where you absolutely must instantiate something from your vendor's libraries. But inference tristate I/O from a single concurrent statement will be safe (and also the recommended way to handle tristate i/o on the three platforms I've used).

    -- output data, driven active when \WR is LOW, high-Z otherwise
    d <= d_out WHEN wr_en_n = '0' ELSE (others => 'Z');

    -- input data
    d_in <= d;

Just don't bury the logic in some deeply nested if/else tree tree in a process or state machine, this is likely to not synthetize to what you had intended. :-).

The hardware internally doesn't use tristate signals, but your VHDL compiler should be smart enough to turn...

    pin <= 'Z' WHEN tristate ELSE '0' WHEN zero ELSE '1';

...into an instantiation of a tristate IO-buffer on an external "pin" which can high-Z. Sometimes the logic isn't that trivial, though, and you (as a programmer) might not realize that your code actually prohibits the pin from going 'Z'... (or you've confused the VHDL compiler).

Better stick to something explicitly simple as the code above, or directly instantiate a bidirectional I/O pin from your chip vendor's VHDL library:

    the_pin: IOBUF port map (
        T => tristate,   -- '1' == high_z
        I => data_out,   -- data leaving the FPGA, may be tristated
        O => data_in,    -- data entering the FPGA
        IO => pin);      -- physical I/O pin