Why? Because it's giving you worse results: Slew time with open-collector/pullup signals is pretty bad because of the 0->1 transision the trace capacitance is charged up via the pullup rather slowly (compared to a proper CMOS driver). Also, for 8 signals you'll need to populate 8 resistors, 8 clamping zeners. Needs more space than a single SOIC-20, which provides you with proper bidirectional drivers.
In this special case, though, the inputs of the NOR flashes seem to be happy to be driven by 3.3V, the datasheet requires Vinh (voltage input high) to be >2V (likely to be compatible with old TTL logic which had this threshold voltage). So all inputs to the NOR flash could be directly connected to a 3v3 microcontroller, leaves only the 8 bidirectional data pins and the "Ready" pin RY/BY#.
So, I'd probably take a bidirectional level shifter for the data bus, skimp on the single "Ready" pin and only use a resistors, as this signal is only interesting during erase anyway. Then everything else could be directly connected to any 3.3v compatible microprocessor.
That way all signals that need to be fast are fast, there's a minimized component count, and the single remaining signal would be for me to be ridiculed for my lack of rigor :-).