zerohp

CPU designers have been aware of this attack vector for a while, so many (maybe all) have controls to lock these registers. They are written and locked by vendor firmware before it hands off to the operating system.

You would have first break the firmware or locks before an attack like this on a modern CPU

Questionable behavior from YC companies is nothing new.

Apple Card already offers credit limits high enough for it

That’s exactly what this is.

9 months to production is completely impossible anyway.

9 months from design to early samples is probably impossible given than TSMC takes 3 months after tape out to produce them. Then it’s up to the customer to qualify and revise for production. TSMC doesn’t do that.

There’s no AI that makes this happen in 9 months.

The Buddha lived before writing in India. We have plenty of other stories that were passed by oral tradition before they were written down.

The time from tapeout to first samples is 3-4 months even for the biggest customers of TSMC.

Shorter for a metal only change.

In the chip design world, 2:1 for design verification to design is on the low end of normal.

Some organizations have gone as low as 1:1 but that is considered an emergency that must be fixed. It’s so important that designers will be intentionally underworked if there are not enough validation engineers on staff.

When you can’t fix bugs in the field, quality is important.

The joke is that AI companies pretend to care about doing legal things.

* * *

My solution is that I no longer contribute to the public internet in any meaningful way. No more open source projects. No more contributions to free software. Bug reports only when it helps me. The hacker ethos is dead. Selfishness and greed won.

Silicon Valley builds empires off the back of free intellectual labor. I'm done with all of it. If they want something from me they can (and do) pay for it.

Methodology doesn't support the conclusion.

Try using images that it wasn't trained on.

I don't know of any CPU that speculates both sides of a branch. I work on a CPU design team.

Modern CPUs speculate hundreds of instructions ahead, and with just a dozen branches you can have a few thousand different paths. It makes more sense to speculate down one path with very high accuracy.

Software table walk performance is bad on modern out of order processors because it has to finish every older instruction in flight and redirect the front end to the exception vector. This can take several hundred cycles. Hardware table walk can take <20 cycles to hit in the next level cache.

In AArch64, `BR LR` and `RET` do not perform the same logic when FEAT_BTI (Branch Target Identification) is present.

As a professional EE, I know that ARM Cortex-M4 is not a chip. It's an embedded processor that is put into an SOC (which is a chip), such as the STM32-family from ST.

More cooks can't make one meal better but more cooks can make dozens of different meals and you can choose the best result.

John Carmack had some things to say about it:

https://www.forbes.com/sites/paultassi/2022/12/17/john-carma...

EDIT: direct link https://www.facebook.com/permalink.php?story_fbid=pfbid0iPix...

How is your wifi network? Have you tried changing the display resolution on the Mac while you're connected to the Vision Pro?

The virtual display doesn't look as good as the laptop screen, but it looks as good or better than the 1440p monitor I normally use at my desk.

You can read the theory of operation for generating negative voltage in this application note from Analog Devices: https://www.analog.com/en/resources/design-notes/generating-...

Compare phones to game consoles.

Can you make a compelling argument? Just saying it’s wrong is not an argument.

If employers don’t like it then they should pay by the hour for 24 hours a day, 7 days a week.

Having multiple threads does not mean that they are all doing equally useful work. Single threaded performance is absolutely critical for a desktop machine.

Even in multithreaded desktop applications, it's rare to see them effectively use more than 8 threads.

100% of the CPU design team at Samsung in Austin was laid off in 2019. That's why none of the authors in this 2020 paper have a Samsung email address.

> The most impactful technology company in the history of humanity.

This statement ignores a lot of history. Apple has certainly done great work but it's hard to compare it to General Electric, or even AT&T.

Without General Electric or AT&T, the last 130 years would be very different.

Why does anyone need a SAAS product for this?

> However, the details of modern branch predictors are proprietary, so we don’t have authoritative sources on them.

I focused on Computer Architecture for a masters degree and now I work on a CPU design team. While I cannot say what we use due to NDA, I will say that it is not proprietary. Very nearly everything, including the branch predictors, in modern CPUs can be found in academic research.

Many of these secrets are easily found in the reading list for a graduate-level computer architecture course. Implementation details vary but usually not by too much.

I’ve tested it. Interrupt to pin latency on ESP32 is more than 1 us so none of those solutions work if you need it to respond in <1 us.

Completely agree. I didn't even start my bachelor's degree until 36 years old.

Three companies have wall gardens for game consoles and nobody cares about that. Those three companies own the entire console market. There's no alternative.

Why doesn't the EU do something about that? Why is Apple an exception?

> And once "computer says no" you'll have a hell of a time trying to fight it.

Cars have been equipped with event data recorders that capture information moments before the crash for at least 20 years. It is part of the air bag controller. Insurance companies have equipment to read that data and use it against customers all the time.

You don't need a Tesla or other black box insurance to get cheated.