alexvoica

We've also looked at data science to solve the problem but found that a traditional approach still offers the best performance.

This gives a comparison between various developers of routing software, including Ocado https://www.technologyreview.com/s/608640/inside-the-increas...

It usually goes like IoT device - gateway - data center. IoT devices are having a massive impact on data center architectures.

You might not, but where do you think the vast amount of data produced by IoT devices is going to go?

No, that is not the primary purpose. I've called out products related to Imagination five times (and all of them in block diagram/images used to illustrate practical examples) in an article of 1,300 words.

I've tried to break down the different IoT categories and identify generic characteristics that apply to them. There are of course hundreds of specific SoCs to choose from but they all typically fall under one of the five categories I've mentioned.

High-density compute nodes are a specific type of processors that have manycore CPUs. The reason they are called high-density is because they pack tens or hundreds of small CPU cores onto a single die. These types of small cores don't provide massive single-threaded performance by themselves but when added together, they can be quite compelling. This is a different approach to having a few but very powerful cores such as Intel Xeons on an SoC. An analogy would be a flock of starlings versus an eagle. Moreover, many CPU designers today have abandoned the practice of scaling in frequency to achieve performance and are focused more and more on performance per watt (hence the term green computing). This is because the costs associated with powering and cooling a data center are rapidly rising.

Yes, but Vulkan will change that since it is an API designed for graphics and compute.

My focus was on mobile, not desktop GPUs. However, I've noticed that energy and area efficiency are starting to become more relevant in desktop too.

At the end of the day, I guess it's all about finding the right balance for your target application.

Allow me to refresh your memory then. How does the following sound to you?

"We also support Full Profile and 64-bit natively, in hardware. After years of evangelising the benefits of such an approach it is nice to see other players in the industry join down this avenue." https://community.arm.com/groups/arm-mali-graphics/blog/2013...

"Mali-T622 was specifically tailored for this job. Mali-T622 also supports OpenCL Full Profile and includes double-precision FP64 and full IEEE-754-2008 floating-point support which are essential features in order to enhance the user experience" https://community.arm.com/groups/arm-mali-graphics/blog/2013...

I could go on with the examples but I think there's no need to spam the thread with tens of blog articles that say FP64 and "native 64-bit" (whatever that means) are essential to the mobile experience.

Videos of the demos below:

https://www.youtube.com/watch?v=HbZxCHr7Lu8

https://www.youtube.com/watch?v=uxE2SYDHFtQ

You can have a look at www.imgtec.com/vulkan for some example code. You can also download the latest Vulkan driver for the Nexus Player.

Source code available at https://imgtec.com/tools/powervr-early-access-program/

I didn't have time to cover it in the video but ray tracing makes a huge difference for foveated rendering in VR. Maybe I'll write about it when I have some time.

I was not disagreeing with the statement, only quoting from the spec list.

There is no PowerVR GPU on this SoC. Besides, we are working on that too. http://www.phoronix.com/scan.php?page=news_item&px=power-vr-...

If funding is not achieved, then backers get the money back. If funding is achieved, then it is up to the company to deliver the product as promised.

There have been some cases where the companies ran out of money before they could deliver on all or any of their promises.

Can you please define "not as good"? I'm trying to understand if you're referring to the quality of the hardware or the software ecosystem - or both.

MIPSfpga is a product for universities and academic institutions. There are a number of advantages of MIPSfpga over OpenRISC and RISC-V including:

1. The MIPS architecture is better supported by university text books. It is used as an example of a RISC architecture and an example of a CPU microarchitectural implementation in Patterson & Hennessy and in Harris & Harris

2. MIPSfpga shares Verilog source code with MIPS microAptiv UP - a commercial core that has many licensees including Microchip Technology and Samsung. The university professors have an interest to teach students about a CPU widely used by the industry, not a subset of an architecture, an old implementation of the architecture or a CPU core created only for academic purposes and not deployed by semiconductor companies.

3. The MIPS architecture is backed by a significant software ecosystem that includes a dozen of commercial RTOSes, official Linux support, compilers and debuggers, open source software, etc.

The point of MIPSfpga is not to deliver the solution optimized for a specific line of Xilinx FPGAs (like MicroBlaze) but to teach students general design practices, applicable to both FPGAs and ASICs. The code in MIPSfpga is not FPGA-specific. It uses Xilinx and Altera macros for memory in caches, but generally this is the same code used to make an ASIC.

The main idea of using MIPSfpga is that the students can play with the CPU core, create multicore systems, modify caches, etc. If they invent something useful, they can attract venture investment, buy a commercial license for MIPS microAptiv UP or MIPS M5150 and create their own ASIC design company.

Hope this helps.

Three main reasons.

1) Going through resellers and distributors adds a signficant premium. By using Kickstarter, we can sell the kit at a reduced price.

2) Kickstarter enables us to communicate directly to indie developers, makers and other hackers and get their feedback on the product.

3) The funds will help us accelerate development for the open source software stack.

Other companies have used crowdfunding to launch products recently, including Canonical, Sony and - more recently - Pepsi.

There are many Linux-capable CPU architectures in use today, including MIPS, x86, Power, ARC and others.

The world is moving towards an ISA-neutral, heterogeneous computing environment. If you look at an SoC today, it is very likely that it uses a combination of CPUs, including ARM, MIPS, ARC etc.

You can check out the Kickstarter page for a full description of the hardware specs and the open source software stack https://www.kickstarter.com/projects/imgtec/creator-ci40-the...

The reality today is that MediaTek is number two in mobile after Qualcomm. Meizu MX5 uses a MediaTek SoC as does the new Xiaomi Redmi Note 2 and many others.

Trust me, it's my job to know.

I wouldn't call Meizu, Xiaomi or other similar brands "far afield". They ship tens of millions of devices (and soon maybe even hundreds) every year.

When I wrote my first article, a lot of people said "Why are they using old technology in a space probe?"

By creating that chart, I wanted to show that a space probe is not a phone or PC. You can't just throw octa-core SoCs inside, pack it up and send it flying into the night sky.

Thanks!

A bit more context: MIPS M-class CPUs implement full hardware virtualization into a microprocessor that is 0.04mm2 - this is 25x-50x smaller than conventional mobile chips manufactured in a 28HPM process node. In addition, a MIPS M5150 CPU can run up to seven guest operating systems in parallel, with minimum overhead on overall system performance and stability.

Virtualization will help developers create new and more secure applications for wearables, IoT and other embedded markets. For example, a MIPS M-class CPU inside a smart home hub can place door and window locks in separate virtualized containers to avoid compromised security throughout the home while a separate container can handle lighting control or the connectivity stack; any change in the operation of a container would not affect the others.

You can see this use case demonstrated below on a MIPS-based development board; when the Linux-based operating system running in one virtualized container restarts, the second container controlling the motor operation continues running unaffected. https://www.youtube.com/watch?v=RjQZTBK1trY

I can tell you that ARM and MIPS ship about 5bn 32-bit MCUs per year combined. I can't give you a statistic for 8- or 16-bit MCUs though.

I wasn't around to witness the Lexra situation so I can't/won't contradict your observations.

However, I think there are a few other reasons why MIPS did not ride the wave of mobile like ARM did.

First of all, MIPS Technologies acquired mixed-signal design house Chipidea for $147m and then sold it to Synopsys for $22m after a rocky two-year integration process.

Secondly, MIPS management focused on markets like networking and home entertainment (set-top boxes, digital TVs, etc.) which did not enjoy the explosive growth of mobile.

To address the second part of your comment about MIPSfpga, this is not "an older core". It is a current-generation CPU capable of running Linux. It is used today in the Microchip PIC32 and the Samsung Artik 1 MCUs - two products that were released within the last year. Furthermore, most of these open cores implement MIPS III or IV architectures from two decades ago whereas MIPSfpga is MIPS32 Release 3. In addition, MIPSfpga implements industry-standard interfaces which make the core much easier to use on an FPGA.

I left out R8000 because it was used only for a short period of time and in a limited range of systems.

I think the original intention of the Stanford group was to highlight pipelining, so the "without interlocked" aspect should be seen in that context and not interpreted literally.

Until the late 1980s pipelining had been drastically underexploited by both CISC and RISC architectures.

Both MIPS and ARM sell CPU IP therefore I'm sure anyone here can dig up several examples of patent infringements that ended up in court.

I think what sets us apart from the competition is the fact that a MIPS CPU is now completely open and free for university use, including production-quality Verilog code and tools from Xilinx.

http://www.anandtech.com/show/9194/imagination-announces-fre...