therealcamino

That's one of my pet peeves on hn, the comments on microplastics studies, or I guess any in-progress science in general. If it's a study on the level of microplastic contamination the environment, or levels and sources of exposure, or to what extent it enters the body, people complain that we don't know yet if they cause harm. When is a study on potential harm, people complain that other substances might also cause harm. They complain generally that the studies don't have total answers, without understanding that this is how science gets us to the big picture.

Well, it's been used in this context for at least 33 years, so it the complaint is a bit late to make an impression.

https://minesparis-psl.hal.science/hal-00752774/document

That's just the shape of the wafer. I don't know why the diagram continued the grid outside it.

If you want to do low level design, you can look at the Micro Magic public domain tool set. As someone said above, Verilog only describes the logical function (ranging from the RTL level to the gate level.) You'd need other tools to work on everything physical, like placement and routing.

https://github.com/yarpose/YARPOSE.Micromagic_PD

Exactly. This is a study about the exposure and absorption parts of the equation. The science is ongoing. People who can't deal with anything less than total certainty don't understand the process.

The paper describes the three kinds of tea bags tested, and how the results differ between them.

So...perhaps worthy of further study, maybe including to understand where exposure comes from, and whether the particles are absorbed? Like this study.

Those are dev boards -- hardware, not software.

Really? It doesn't seem to me like much Intel-written software has been key to x86's success. The things I can remember from Intel are compilers, performance analysis tools, and threading and math libraries. But none of them were must-haves, or differentiated x86 chips from competing CPU architectures. Most of the software that made x86 successful came from third parties.

And more recently, the reviews I read of the Archmage graphics drivers didn't make it sound like Intel had understood the importance of the software that was essential to a pretty big hardware release.

I think Funko's products are classified as collectibles, not dolls. I am sure they have licenses from Disney.

It seems to me like a more valid way to describe that work is that, you can predict an artist's long-term success based on their early success.

The first five venues where an artist exhibits isn't wholly based on their social networks, but also tells you how excited the art world is about their work. Since attitudes about the work or the artist are key factors in establishing what their early network is, I don't see how you can conclude that the work and the artist are irrelevant, but the network is relevant.

I find it hard to imagine how you'd implement various simple functions in the bitgrid. It would be interesting if you'd present some simple hand-worked examples.

For example, how it would implement a 1-bit full adder? Like the nitty-gritty details: which input on which cell represents input A, which represents input B, and which represents carry-in? Which output is sum and which is carry-out? What are the functions programmed into each node that it uses?

Then show how to build a 2-bit adder from there.

That sounds like good work, but we can't ignore the context. Nvidia can train their own LLM's on proprietary Nvidia designs, which isn't a possibility for a random startup.

If the evaluation of the approach is "it works great if you train it on a few decades of the best designs from a successful fabless semiconductor company", I would say that if you plan to use that method as a startup, you're clearly going to fail. Nobody's going to give away their crown jewels to train an LLM that designs chips for other companies.

There are lots of reasons to doubt the present-day ability of LLMs to help with chip design, but I don't think any of these things above are why. Chip design isn't done with schematics. If an LLM can write Python given enough training data, it can write SystemVerilog given a similar amount of training (though the world currently lacks enough high-quality open source SV to reach an equivalent level.) We can debate whether the LLM actually writes Python well. But I don't think there's a reason to expect that writing SV requires a different approach.

I took it to be a joke that the description "slow, expensive, non-deterministic black boxes" can apply to the engineers themselves. The engineers would be the ones who would have to place LLMs at the core of the system. To anyone outside, the work of the engineers is as opaque as the operation of LLMs.

That's true, you don't hear about these dates in vertically-integrated businesses, but it's a bit of a misdirection. Vertically-integrated manufacturers definitely don't take 6 years from RTL completion to mass production of the end product.

There are so few because he's an incredibly talented writer, able to explain arcane financial concepts with insultingly basic analogies, and toss in hilarious asides on the absurdity of it all.

The only other writer I can think of who elevates their topic in a similar way is Dan Neill, the automotive columnist for the Wall Street Journal, who won the Pulitzer Prize for criticism when he worked at the Los Angeles Times.

From the linked Nature article: "The 5.8 mW power consumption is predominantly static (99%) because of the resistive pull-up logic."

Used in that sense, the same software could be called Samsung's and Intel's and any other foundry's, since it is qualified for use with those processes as well. But that's not really the main point I was making, which was that there have been 20+ years of cooperative effort in both process design and EDA software to optimize for power and trade it off against other optimization goals. While there are design and packaging approaches that are only coming into use because of "end of Moore's law, what do we do now" reactions, and some may have power implications, power optimization predates that by a good while.

If you don't worry about the programming model, it's pretty easy to be way better than than existing methodologies in terms of pure compute.

But if you do pay attention to the programming model, they're unusable. You'll see that dozens of these approaches have come and gone, because it's impossible to write software for them.

EDA software has long allowed trading off power, delay, and area during optimization . But TSMC doesn't produce those tools, as far as I'm aware.

I'll tell you what: no matter how hard anyone looks in my past, nobody's going to find massive plagiarism. Why? Because I didn't commit plagiarism. You find plagiarism in the pasts of plagiarists. Let's save the defense for people who deserve it.

"I did not go though the grueling process of writing an original PhD thesis, just to share a title with those who plagiarized their thesis."

Amen. No to excusing plagiarism of folks that have used it as a tool to climb the ranks of academia.

Yeah, there are lots of interesting applications of getting other vehicles or traffic signals to favor you by sending wrong data!

There are a bunch of references to "Security Credentials Management System providers" in the DOT document. So it sounds like there will be some attempt to reject self-serving incorrect data, and even a mechanism to report and exclude "misbehaving" devices. But there are lots of gray areas and value judgements in what's allowed to be sent.

The message types are interesting to read (second link below). I thought at first that the Red Light Violation Warning was a message where your own vehicle sends out "Hey, we're blowing this red light, everybody watch out!" But I think that one is intended to be sent by the traffic signal system. But still, if you aren't in control of what your vehicle sends, what's to stop it from broadcasting data you don't want it to send, like "Hey, we're exceeding the speed limit by 17 mph"? Another value judgement that seems like it would be made at some regulatory level. Even if the messages are completely anonymous as claimed, you probably (at a personal level) don't receivers to clue in traffic police to show up further along your route, or have insurance companies try to match those with private roadside license plate reader data. At a societal level I'm sure some people would favor that, and others wouldn't.

https://www.its.dot.gov/resources/scms.htm

https://www.its.dot.gov/research_areas/cybersecurity/scms/SC...

> I need to take expressions, or programs, and break them down to a directed acyclic graph of binary logical operations.

This strikes me as not quite a correct description of the problem. What you described in that sentence above is closer to a description of compiling a combinational subset (just expressions, no state) of a hardware description language to logic gates.

The BitGrid has two differences from that. One, you have state registers after every cell: essentially it's pipelined at the single-cell level. Two, the routing of signals is fixed to be able to reach nearest-neighbors only. That means you end up needing to spend logic cells for routing and incur a one cycle delay for every hop away that you need to reach (whereas that's essentially "free" in gates).

Those make the problem significantly more complicated because you're not just mapping a function on to logic, but needing to do routing and a kind of delay analysis ("which cycle is this input signal from?) at the same time.

My suggestion would be to simplify the problem first. For example, allow routing any cell's input to any cell's output in the first stage of complication, then do a phase where you insert the routing.

To me, the level of pipelining and nearest-neighbor restriction makes it hard to approach the problem: the seeming simplicity ends up making it hard to wrap your mind around a larger computation. The routing is nontrivial; using cells for plain routing wastes logic resources; and the one-cycle delays become a complex problem to be worked around instead of a feature. It's interesting to think about but if it were my project, I'd think about changes to the model first to make life simpler.

If you have working software that gives orders of magnitude improvements, needing $100k worth of hardware would be no barrier at all. That's a fraction of just the EDA software license budget for many projects.

What passenger vehicles made in the last 25 years have body on frame construction? Serious question. I thought that went away a long time ago.

From the article:

> In about 25% of [study patients] their lung cancer had already spread to the brain when the study began.

and

> “Lorlatinib is the only ALK TKI that has reported five-year progression-free survival, and even after this time, the majority of patients continue to have their disease controlled, including control of disease in the brain.”

Yes, it's much easier to buy ahead of time in the app and have it automatically activate upon arrival, instead of having to find a kiosk in the airport.

I've used the Airalo app to buy data-only eSims in multiple regions, and they have global ones also. I would guess it's not as cheap as you'd get if you waited to buy from local providers in arrival, but it's very convenient.