heathjohns

Author here, that is precisely the point of Blinklight (the site this blog post is from) :)

It starts from the absolute beginning, and the tools and tutorials are web-based and integrated with each other:

https://www.blinklight.io

The focus is from Hello World to personal computer, but I've built a DSP-based guitar pedal in the past, and signal processing is really fun - I'd love to create a parallel learning path from Hello World to DSP at some point.

Author here - have a look at the main site, it was made just for that purpose: https://www.blinklight.io

It's based around the iCE40/IceStorm, but it has its own specific "dev board". I'm planning on making it more generic later on.

The trouble with "golden" chips is a) the manufacturer can EOL it at any time (and I don't think just the OSS people are numerous enough to keep any specific set in production), and b) it freezes things in time. For things that don't change much (e.g. sound cards), no problem, but there's still improvements to be made in other areas.

The focus for FPGAs has traditionally been performance, but I think there's a model where they can be used for both long-lived compatibility and cutting-edge devices living together on the same chip.

Things have been changing - they put FPGAs in phones now:

https://www.ifixit.com/Teardown/Samsung+Galaxy+S5+Teardown/2...

(search for "FPGA" in the page).

That's a tiny one, granted, but things are certainly getting better in that regard.

> The problem is that many aspiring learners want to approach it like a software problem.

That is precisely why I made Blinklight - it's an educational platform for starting at the very bottom.

I don't disagree. I'm reasonably optimistic that current and near-future FPGAs are overkill enough for the job of motherboard chipset and basic peripherals that that some basic portability abstractions can be put in place (e.g. ASM -> C) without causing such a performance hit that it's not viable any more.

Author here - I'm advocating the latter.

I agree with you to a point. However, I believe that those things that have been with us for decades: sound cards, 2D graphics adaptors, network cards, etc. can be done in FPGAs, and should be.

The speed is there, and the power used by the southbridge and peripherals is eclipsed by the processor and the screen backlight, so I don't think the power consumption is worth worrying about (I'd be interested to see evidence to the contrary, though).

Put another way: much of the foundational chips on motherboard are no long performance-sensitive, so we shouldn't be paying a compatibility price for it.

I don't disagree at all. There might be some gains to be had from stacking things high in 3D (reducing the physical distances a little). And there's clearly some room for improvement on the compute power per watt front, but even if (for example) the Mill CPU pans out, my impression is that there's not a huge amount of territory left in that direction either (at least on silicon), and the impact on max single-core performance would be limited.

So yeah, the party's definitely over and it's down to more efficient software at this point until we get optical computing or rod logic or something crazy like that.

Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core.

That, combined with Amdahl's law, means that the unmistakable levelling off that we're seeing now will place some pretty firm limits on what we can compute until we move off of silicon.

It's going to be a very interesting space, IMO.

The thing about FPGAs is that they are deeply dependant on storage technology. Right now their gate configuration is kept in SRAM loaded in at boot, which is the worst of all worlds. Not only is it non-volatile, it's very power hungry and takes up more than half of the space on the chip. And flash memory hasn't helped much because (from what I've been able to figure out) having tiny sections of flash for each logic element is impractical due to the physics of how it works.

However, flash and SRAM aren't the end of the line, and advances in non-volatile memory will disproportionately affect FGPAs. It seems almost inevitable to me that the NVM landscape will be changing soon: several technologies are being worked on in parallel (e.g. NRAM and RRAM) - one of them is going to win, there's just too much demand for higher performance storage. When that happens, FPGAs will get to draft behind the huge tech investment made for the sake of SSDs etc.

FPGAs with tiny NVM will look a lot more like structured ASICs (a prefabbed grid of gates, with a custom metal interconnect layer) than their current form. Instead of needing ~10x power and supporting ~1/4 the clock speeds, it'd be about half as fast and twice the power - still not ideal, but within spitting distance of the advantages of FPGAs outweighing the disadvantages vs. ASICs, and certainly a qualitative difference from where we're at today.

This, combined with having the same thoughts as you about the criticalness to open computing, has gotten me to start working on improving the tooling for people just getting into FPGAs. It's hard to have an openness-based movement when there's not enough people, and it's hard to get people in if the first rung of the ladder's too high (e.g. installing a grab-bag of software and learning Verilog as step #1).

Here's my (very alpha) work so far: http://blinklight.io (I haven't publicized it yet because I'm going to be doing a big change to the pitch/target market soon). I'm well aware of the limitations of visual programming, but I think it's an excellent basis for developing intuition before moving on to HDLs (especially for people coming from software who are thrown off by Verilog's superficial similarities to C).