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Comment by heathjohns | Hacker News Reader

Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core.

That, combined with Amdahl's law, means that the unmistakable levelling off that we're seeing now will place some pretty firm limits on what we can compute until we move off of silicon.

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> Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core.

Imagine that we have the technology in place to manufacture silicon chips at 2nm. How would we design CPU cores with a substantially better single-thread performance, when clock speed is limited? Optimization techniques like OoO execution and register renaming have already been pushed to their extremes. Increasing caches beyond a certain point has been shown to deliver diminishing returns.

We just don't know fundamentally how to design a substantially faster CPU core.

One option is to have multiple cores dedicated to the same workload and then switch between them as they heat up. There are many issues with this approach which make it impractical, but if your really do want speed at any cost then it may be worth it.

PS: It's a Gatling CPU...

And all you would need to sell them to the Army would be to make it play the "BRRRRRRRRRRRRRRRT!" from a GAU-8 over the system speaker whenever it is actively crunching numbers.

I don't disagree at all. There might be some gains to be had from stacking things high in 3D (reducing the physical distances a little). And there's clearly some room for improvement on the compute power per watt front, but even if (for example) the Mill CPU pans out, my impression is that there's not a huge amount of territory left in that direction either (at least on silicon), and the impact on max single-core performance would be limited.

So yeah, the party's definitely over and it's down to more efficient software at this point until we get optical computing or rod logic or something crazy like that.

Doesn't most speed critical software fit a parallel model ?

You didnt see extreme yet. Extreme superscalar would be cores capable of executing 16 independent instructions per clock, not 4 (current intel max). Instead we got SIMD and multicores, or moves in reverse directions like HT.

Not to mention there is lots of room for improvement on the memory front, stalls kill performance.

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