How do these fare in terms of absolute performance? The NEC TSUBASA is not a CPU.
> Do you have more examples of this?
I ported some numeric simulation kernel to the A64Fx some time ago, fixing the vector width gave a 2x improvement. Compilers probably/hopefully have gotten better in the mean time and I haven't redone the experiments since then, but I'd be surprised if this changed drastically. Spilling is sometimes unavoidable, e.g. due to function calls.
> Anyway, I know of one comparison between NEON and SVE: https://solidpixel.github.io/astcenc_meets_sve
I was specifically referring to dynamic vector sizes. This experiment uses sizes fixed at compile-time, from the article:
> For the astcenc implementation of SVE I decided to implement a fixed-width 256-bit implementation, where the vector length is known at compile time.