Also just to check your facts on the 10nm fab problems. Intel's first FPGA for Altera was always planned to be 14nm. It was totally trash for reasons entirely within Altera's control (don't rock the boat, just wait for the acquisition to close). And the synergistic products were a dead end. I'm sure the 10nm catastrophe didn't help but really that time would've been well spent unpicking the disaster of Stratix 10.