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Comment by dahfizz | Hacker News Reader

The paper says they tested the durability of the ram with a 5ms program-read-erase-read loop. Meaning each time they program-read-erase-read, it takes 5 milliseconds.

Ten trillion cycles would take over 150 years.

I'm guessing a silicon lab doesn't have "the rest of the computer" that would allow them to run this ram at full speed constantly. This UltraRAM isn't something they can just slot into their motherboard.

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5ms is 200 cycles per second. 3600 seconds in an hour. 0.72 million writes per hour. Almost 40 million if I start it on Friday evening and stop it on Monday morning

10 million is 14 hours. It takes longer than that to prepare your documentation. Something is rotten in Denmark. A skeptic could very, very reasonably assume that cherry-picking is going on here, and that 10m to degradation isn't far off from the truth.

These labs have their custom structures synthesized, adding a small circuit specifically for endurance testing would be trivial compared to what they have achieved designing and implementing the structures they have.

Could processors keep up with it?

Half in jest: if processors couldn't keep up with it, it would be used to replace flip-flops etc in processors...

That doesn't necessarily mean the processors would become any faster ...

It kind of does, all else being equal. What else do you have in mind? Parasitic capacitance on signal lines?

This is a common problem in memory. Oftentimes they use models to accelerate the wear and tear through temperature, voltage, etc. and extrapolate the lifetime

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