Seems like you're still generating the same total amount of heat, that needs venting from the machine. And still consuming the same amount of power.
I'm sure there's some value here, but it's not going to arise from just stacking up the same chips we use today.
A conventional chip is a thin planar heating element attached with maximal surface area to its heat sink and we have great trouble keeping them cool now.
Heat generated internally a cubic object is more difficult to remove because the volume that is generating heat grows faster in proportion to the surface area available for removing it. I.e., the heat generation grows with the cube of the unit length and the surface only with the square).
The worst shape of all is spherical which has the highest possible ratio of volume to surface area.
Even if they managed to put heat sinks in contact with all six sides of this stack of dies, they could (at best) only remove six conventional chips' worth of heat.
Unless they have a way of circulating liquid coolant through that volume, stacking chips like that is only practical if they're almost completely off.
For servers, you face the same problem. It's already possible to get power and heat density that is more than what your typical datacenter can handle. If the density increased by even 10 times we would presumably need some serious advances in cooling to be able to handle all those servers.
As I understand you have to make circuits faster and smaller at the same time, so you still have time for clock distribution...
We are talking about pretty radical processor designs. Why not go asynchronous if we are talking about coordinating multiple layers of silicon?
It will be interesting to watch. If real devices built with that technologies start showing in p and zSeries machines before 2015, we'll have some serious performance bump in high-end computers.