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Comment by messe | Hacker News Reader

For those of us wondering what they meant by 16-bit RISC-V (as there isn't a 16-bit RISC-V ISA), it's just 32-bit RISC-V instructions operating on 16-bit data and addresses.

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Sort of what the MC68008 was ages ago: 32 bit internal architecture but reduced external data and address buses so the chip could be used to build simpler/cheaper systems.

MC68008 was internally 16-bit. 16-bit "add.w d0, d1" takes 4 clock cycles and 32-bit "add.l d0, d1" takes 8.

32-bit internal architecture here meaning 32-bit registers, and a greater than 16-bit address space (yeah it's not full 32-bit, but neither read the full 68000).

68000 was a 32-bit ISA, but with 16-bit internals, mainly meaning ALU. 32-bit register file, flat 32-bit address registers (pointers). Moving data with move.l and move.w between registers was both 4 clock cycles. I wrote a ton of assembler on 68k back in the days and absolutely loved the large orthogonal register set and useful addressing modes. Going to x86 was rather painful after that. :-)

Some ways 32-bit, but 16-bit level performance.

I think in the end you can call it either way.

But like, a z80 had a 4 bit ALU and internal datapath, but I don't see anyone calling it a 4 bit architecture.

Now that you mention, z80 always felt so 4-bittish... ;-)

Haha, ok, fair enough. : )

I think it's more like a 16-bit internal architecture and buses - so PDP-11 sized, add a rudimentary base and bounds swapping MMU and you have enough to run unix

RetroBSD would probably be a good starting point for anybody interested in porting a unix to this device. It's based on 2.11BSD (a backport of 4.3BSD features to the PDP-11)

I've looked into porting it to the Nintendo DS. It should be doable, but I haven't had the time to commit to it. Maybe I'll give it another look this weekend.

Or the 8088, 16 bits internally, but external buses (memory, port i/o) only 8 bits wide?

No, there is a 16-bit version https://content.riscv.org/wp-content/uploads/2017/05/riscv-s... See chapter 12, “C” Standard Extension for Compressed Instructions

> This chapter describes the current draft proposal for the RISC-V standard compressed instruction set extension, named “C”, which reduces static and dynamic code size by adding short 16-bit instruction encodings for common operations.

The RISC-V compressed instructions are more a shorthand for some commonly used 32-bit instructions than a 16-bit ISA that stands on its own: the compressed instructions lack a number of essential operations that make it impractical to only use compressed instructions

This is in contrast to, say, the ARM Thumb instructions, where you can can have entirely libraries that use 16-bit instruction without ever needing a 32-bit one.

That's not what this is. That's just shorter versions of several common instructions to increase code density, not a 16-bit ISA.

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