Also, to be pedantic, POWER is very much not RISC; the only thing it really has in common with RISC is fixed-length instruction encoding (though simpler instruction decoding is an advantage at really low powers).
This doesn't actually answer my question at all, it's just a canned response to something I alluded to in my question (CISC vs. RISC) and a debate which I don't fully understand and would rather avoid. The question was why does POWER consume so much power, not why doesn't POWER being RISC matter? The only reason I compared it to MIPS and ARM was that I thought it was similar to those architectures and they're considered to be low-power.
The impetus is that POWER is actually worse than other architectures, including x86, for unexplained reasons, w.r.t. power consumption.
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To clarify, the difference between ISAs for power efficiency is negligible at all but the lowest powers, which is what I was trying to say in my original response. The Pentium 4 was far less power efficient than the contemporary G4 PowerPC, as a counterexample. If the power difference between two chips is more than 1 watt per instruction decode unit, you can probably safely assume it's not due to the ISA.
IBM's power consumption is probably mostly because they've never put the processors into energy sensitive applications. More importantly, they are sold because of some benchmarks and extreme reliability.
Note that most ARM processors are two-issue in-order, so RISC is still relevant at the low end. Compare power consumption of ARM vs. equivalent Atom processor. Intel has a process advantage with Atom, but ARM is still lower power.