Fair enough but I don’t work for AMD.
134 karma · joined February 7, 2026
No. I said the low-end of FPGA sales is getting eaten by microcontrollers and the high-end of FPGAs sales is probably about to get eaten by custom ASICs.
Although the cost of making an ASIC is high, in the larger nodes it's not that high, and getting ever cheaper at FPGA performance levels and logic densities. FPGAs are terribly inefficient with their HW they're very easy to beat with an ASIC. They only get away with it because the NRE today is lower. But it's not an order of magnitude lower and I'm not sure how much longer that will be the case in nodes at 28nm and larger based on what I know Universities pay in tape-out classes.
Will there be very low qty projects where the NRE of developing an ASIC overwhelms that of an ASIC, sure. But will there be enough business in that niche to sustain the business of AMD, Intel and Lattice? Not obvious.
And I don't think the FPGA hobbyist market of people who "want to learn HDL" spends enough money to affect what's coming and this decision from AMD reflects that.
> 1. For one-off designs (quantity=1) ASICs will never beat a high end FPGA on unit price.
Never say never. These guys were able to convince investors you're wrong about that. :)
P.S. If you're a hobbyist who wants to make an ASIC... https://www.tinytapeout.com
https://www.amd.com/en/corporate/university-program.html
You can get free licenses and donated hardware through this program.
"The Harsh Truth about FPGAs (You Should Avoid Them?!)" https://www.youtube.com/watch?v=l3d8uFKsJiY
a.k.a. Just use a microcontroller. And for the vast majority of hobby projects I suspect that is good advice. Low end FPGAs don't compete well with low end microcontrollers and more people know how to use microcontrollers.
Universities are fine as they can sign up for the University Program and get the licensees they used to get. https://www.amd.com/en/corporate/university-program.html
I think the reality is the niche that FPGAs occupied is getting hit hard on the high and low end. Cheap Chinese FPGAs are prevalent, cheap microcontrollers more so, and on the high-end making an ASIC that compete with a high-end FPGA has never been cheaper, and is getting cheaper and easier everyday. 65-28nm is very easy to use now (relatively speaking) and is very low cost with tons of tape outs and there is good competition. Beating an FPGA with an ASIC is not all that hard. Grad students at CMU, Stanford, Georgia Tech, etc. do it all the time in their tape-out class. Making an ASIC is not as easy as an FPGA for sure, especially if you need DDR and serdes. And NRE for ASICs for small volume ( <1K units) is higher. But it is getting easier and cheaper everyday. And it's now feasible for small teams (say ~6) to do it. I think they need to look very hard at where they spend their NRE now to stay relevant and they need to start getting brutal because I am sure the amount of revenue they're bringing in is under serious attack.
As to why Windows and not Linux? It's probably cheaper for them to maintain Windows for one reason or another. Maybe they don't even do it an just contract it out and Windows contractors are easier to find, but I'll bet it's just a basic cost issue at the end of the day.
As for hobbyists, in the world of $0.03 microcontrollers, strong competition on the low end from Chinese manufacturers, and where few people learn HDLs, is NRE money in the hobby market really money well spent?
I'm a HW designer and even I use microcontrollers now for most things, but not everything, because it's usually cheaper and faster.
With semiconductor prices coming down as far as they have I think the world has probably fundamentally changed for FPGAs and the niche they occupied is shrinking fast.
I have no idea how the law works in this case but if you could prove damages couldn’t you already sue? This is a guess but maybe this law clarifies what is considered damaging which is what enables them to prove damages where under previous definitions they couldn’t?
https://www.seattletimes.com/business/boeing-aerospace/congr...
I'm confused, isn't the whole point of using the STM32CubeIDE that all the peripherals, like say setting up an ADC on pins 4 and 7, are checkbox features?
That's a pretty interesting use case. I assume this is for RTL simulation given the thread, but how do you connect the output of the simulator to the AI?
With such a great plan what could possibly go wrong?
https://www.reed.edu/economics/parker/f13/201/cases/Argentin...
"Argentina, like many other chronic-inflation economies, went through repeated cycles of hyperinflation followed by attempts at stabilization. A typical cycle in such an inflationary economy begins with acceleration of money creation to accommodate the government's budgetary needs. As inflation accelerates, political pressure to reduce inflation builds, leading to an eventual "monetary reform." Such reforms usually include the introduction of a new currency (which is convenient since inflation has usually moved the nominal prices of goods and services into the thousands, million, billions, or even trillions of units of the old currency) and promises on the part of the government (which is in charge of the budget) and the central bank (which is in charge of issuing money and is often under direct control of the government) to follow rules leading to slower monetary growth in the future."
But the idea that some code is cheap and some code is expensive is not new.
The only new thing is there are some adjustments on how to asses the value of the code you’re presently, or about to, work on.
AI has absolutely expanded the set of code that is cheap and if you can make a thing easily with AI then so can someone else. That project is unlikely to result in valuable code. Which is not to say it doesn’t have utility. Just its monetary value is low.
A lot of the people who post online have no experience with the paid PCB tools and those tools already have quite a lot of automation, and the automation interfaces work between different CAD & EDA vendors. Shared, hierarchical, and repurposed schematics are also totally a thing.
I spend almost no time on boiler plate stuff. And with good constraints, which require serious thought and understanding, tons of routing & checks can be automated too. Right now.
So, IMHO, there is not a lot of fat in the process for AI to automate away without a lot more EE and physics models, and the ability to interpret multiple specs, built in. And the current AI tools are very far from that.
https://en.wikipedia.org/wiki/2025_Hudson_River_helicopter_c...
https://abc7ny.com/post/mta-driver-injured-bus-crashes-store...
"File > New Project from Template"
KiCAD comes with all the usual suspects, including Arduino and the various hats. You can get pmod templates, etc. They're actually really nice.
I use the pmod template all the time because it saves time and they're convenient to plug into Arty dev boards. PCBs are so cheap and quick I'll often make a quick PCB with a template because I just want a cleaner connector system. PCBs are basically bread boards these days.
https://techexplorations.com/guides/kicad/3e/create-a-new-ki...
The ones I use certainly are. And with a bit of training you can reason and predict how they will respond to a given input with a large degree of accuracy without being familiar with how the particular compiler under question was implemented.
Not so with the AI tools. At least with the ones I use anyway.
LPCAMM2 really shows the trade-offs. It adds a lot of bulk and cost, and repairability hasn't been valued high enough by the market to cover that overhead for most consumers. That's why Micron exited the market they played a big part in founding.
https://www.ifixit.com/News/95078/lpcamm2-memory-is-finally-...