seveibar

Standardization is extremely unlikely, chip manufacturers won't/haven't made a major effort here and having spoken with some, they don't want to. It is much easier and more feasible at this point to do automated visual analysis against the footprint and discovered photos from the internet

AI is exceptionally good at RP2040/RP2350/ESP32-based boards, we've ordered ~15 unique designs, mostly RP2040-based that were designed and autorouted with AI using tscircuit and usually OpenAI models.

Currently the major mistakes that AI makes: 1) Improperly rotated connectors (backwards USB port) 2) Endless routing loops for complex boards 3) Really huge/unreadable single page schematics

I'm extremely bullish on AI for PCB design, but there is a huge, huge tooling gap. We basically need to soup up all our collective design rule checks so that AI can work in corrective loops. It needs to check for things like "opamp schematic layout conventional" and "trace width closely matches reference design for chip". One thing that makes me super excited is supply-chain resiliency when chip/subcircuit-swapping becomes super easy

Many of the new agentic electronic design tools are KiCad-based, which is fine, but for people creating new EDA tools I'd encourage them to take a look at tscircuit (open-source, MIT). KiCad wasn't built for AI-gen with things like automatic routing/placement, supplier footprint orientation checking, connector orientation checking and other features that will be required as more people expect extensive validation for AI-generated designs. KiCad could add these things, but they've got decades of baggage and many Altium features to pull in. I'm worried that we're all getting bound by KiCad s-exprs

We (tscircuit) are trying to develop a PCB fabrication method that's compatible with US regulation (i.e. a dry process without etchants)- we're seeing awesome results using UV lasers [1]. Would love to chat sometime!

[1] https://x.com/seveibar/status/2085438976622780654?s=20

tscircuit! An open source framework for building circuits, we have a lightening fast autorouter so i spend lots of time debugging complex PCB routing problems

We work on this a lot at tscircuit, and we've used cassowary (i.e. flexbox-style) constraint solvers. The issue with cassowary/flexbox is PCBs are not as uniform as webpages w.r.t. alignment, and often have a much less nested structure (3 layers) vs web pages which have many many nested layers. CSS grid-style constraints are a much better fit IMO, but we eventually settled on sequential optimal packing[1] for "seeding" a placement so that AI can get initial positions before working in a feedback loop. I like sequential optimal packing because it's very very deterministic and the constraints are specified pretty close to how a human would specify them

[1] https://blog.autorouting.com/p/sequential-optimal-packing-fo...

> To me innovation in autorouting means being able to 'have a conversation' with it: being able to easily adjust things and see the results and map out the tradeoffs would be very useful

author here: This is basically our philosophy. LLMs can churn out constraints/code very quickly to pull out the specific requirements for a design or the chips you're using. When people use tscircuit (or any electronics-as-code framework) they can talk to an LLM and just keep yelling at it in the same way you yell at an LLM to fix a web page. The success of web pages and LLMs is built from small constraint algorithms like flexbox and CSS grid, this article is just one constraint algorithm that can help LLMs approximate a solution without specifying a bunch of XY coordinates that would challenge its spatial understanding

author here: I think synthetic data, generated by ~brute force iteration with LLMs, with every DRC analysis imaginable and more, will yield a more consistent/usable/larger dataset than any existing dataset. It's a mistake to put too much weight in anyone's existing data. This is why we work hard to make algorithms that LLMs can use, because they have emerging spatial capabilities that excel when coupled with detailed analysis.

Author here. Happy to hear thoughts on this article! Our goal is to make a "realtime PCB autorouter", which means every millisecond matters!

Hello everyone, just wrote this article to hopefully save someone a year of time while building an PCB autorouter. Enjoy! Here for questions.

Game developers do bake navmeshes that's true, but it's not the only technique, for example they've also come up with Polyana or "any-angle pathfinding" https://github.com/vleue/polyanya

I also have on my desk "Algorithms for VLSI Physical Design Automation Third Edition" which I really like, but it's ~20 years old and has a lot of nomenclature that can be helpful, but I'm not a big believer in how the problems are broken down, which is IMO more oriented towards "designs with repeated patterns" rather than PCBs that don't usually repeat patterns (unless you're doing an LED matrix)

Despite what electrical engineers would claim, I think it's very under-studied under a modern lens. When people ask for good places to get started I usually tell them to just look at what game developers are doing for pathfinding. Autorouting sort of a form of multi-agent pathfinding, so there are a lot of relevant concepts from that area.

The tension in autorouting IMO is people generally want something ideal that passes all design rule checks. My thinking (and IMO the more modern way of thinking) is that fast algorithms, fast feedback loops and AI participation are more important.

There are also a lot of relevant algorithms in VLSI/chip design, the folks at OpenROAD seem to have good stuff although I'm not intimately familiar.

This is sort of the premise of all of us electronics-as-code startups. We think that a text-based medium for the representation of circuits is a necessity for AI to be able to create electronics. You can't skip this step and generate schematic images or something. You have to have a human-readable (which also means AI-compatible) text medium. Another confusion: KiCad files are represented in text, so shouldn't AI be able to generate them? No- AI has similar levels of spatial understanding to a human reading these text files. You can't have a ton of XY coordinates or other non-human-friendly components of the text files. Everything will be text-based and human-readable, at least at the first layer of AI-generation for serious applications

Isn’t this just Apache 2-style permissive licensing?

Strongly disagree with the article. Enums make gradual migrations impossible in both databases and API design with third party consumers. Even in the example they gave where they recommended a user “role” instead of an is_admin boolean they are creating huge problems. Am I supposed to tell all my downstream API consumers that they need to refactor their code because we’re introducing a new value to “role” that covers “billing_manager”? There are literally zero downstream issues with adding is_billing_manager, and you get the additional representation benefit that the booleans can _both be true_, so I am not trapped into an exclusive role paradigm.

Awesome to see more people experimenting with AI-generated electronics. The main thing holding back physical world innovation is the labor cost of design- I’m always blown away that someone needs to raise $50m just to design a hardware AI-assistant or new robotics

Frameworks like atopile, tscircuit (disclaimer: I’m a tscircuit lead maintainer) and JITX are critical here because they enable the LLM to output the deep knowledge it already has. The author is missing a couple pieces to really get great output: 1) Context-friendly datasheets 2) DRC/Semantic review 3) LLM-compatible layout methods

The hardest to build is (3) and what I spend 90% of my time on. AI knows how do do spatial layout for things like flex or css grid but doesn’t have a layout method for PCBs. Our approach w/ tscircuit is to develop new layout systems that either match templates, new heuristic layouts (we are developing one called “pack”), or solve simple spatial constraints.

But tldr; it is only a matter of time before AI can output PCBs. It is not simple but we know what works with LLMs from witnessing the evolution of AI for website generation

There's a lot of potential for desktop rapid-prototyping with electronics. I think one of the things that is killing us is the tooling. One of the reasons I started building an autorouter was because I wanted to be able to have different "build targets"- e.g. a build target that is a PCB with no vias and only 0 ohm resistors (jumpers). If our EDA tooling supported different build outputs, then we could have earlier prototypes built with less-than-ideal equipment (e.g. conductive 3D printed filament, as the article suggests)

Hardware is becoming more accessible, so more software companies are going to release hardware products or build hardware products for internal purposes. The future of physical world innovation isn't going to come from legacy hardware corpos, but from software companies that run hardware experiments that become real hardware products. Hats off to Posthog for making it cool!

The reason hardware has sucked in the past is poor tooling. But now open-source solutions are getting pretty good, and AI is covering many knowledge gaps.

I've updated the article with the fixed projection transform! I had to make an animation as well just to validate it- I fooled myself!

Your renderer looks awesome! I was surprised there wasn't an "off the shelf" SVG renderer in native TS/JS, it's a big deal to be able to create 3D models without a heavy engine for visual snapshot testing!

Circuit boards have holes, cutouts and import STL/OBJ components that we'll eventually support in this 3d renderer. Assuming we get that far I may have to rename it from "simple-3d-svg"!

I was at least a little confused because yea fish eye isn’t possible with a 4x4 perspective transform matrix. I’m investigating an issue with the projection thanks to some help from commenters and there will be a correction in the article, as well as an animation which should help confirm the projection code.

We could absolutely use isometric projection, but personally I find them a bit hard to visually parse.

That admittedly looks a lot more correct! Thanks for digging in, i will absolutely test and submit a correction to the article (i am still concerned the straight edges are misleading here)! And thanks to the original commentor as well! I think I will try to quickly output an animated version of each subdivision level, the animation would make it a lot more clear for me!

Because it’s only being used for power and doesn’t need a lot of power, it works for the simple board we rendered. In practice you would absolutely want to set the CC1 and CC2 configuration with resistors!

The top of the PCB (the lines etc) are computed as an SVG, i would have to have an SVG rasterizer just to begin with that approach, then would be limited by what images I could rasterize. It would also be much much slower than quickly computing matrices

Very small files and a much simpler rendering scheme! I don’t have to rasterize my SVGs that represent the top of my board

Author here: I don’t think the commenter here has set the same focal length, the focal length can make a surface appear curved, I set it explicitly to a low value to test the algorithm’s ability to handle the increased distortion. You can google “focal length distortion cube” to see examples of how a focal length distorts a grid or you can google “fish eye lens cube” etc.

Edit: I think there’s a lot of confusion because the edges of the cube (the black lines), do not incorporate the perspective transform all along their edge. The texture is likely correct given the focal length, and the cube’s edge is misleadingly straight. My bad, the technique is valid, but the black lines of the cube’s edge are misleadingly straight (they are not rendered the same way as the texture)

The goal for this vanilla TS renderer is to have visual diffing on GitHub and a renderer that works without a browser environment. Most 3D renderers focus on realtime speed, not file size and runtime portability. I think in practice we will configure the subdivisions at something like 64 for a good file size tradeoff

Defs saved the day here on file size- repeating the image (which we usually base64 encode) would have caused a much larger file size and made rasterization much more appealing!