rrss

Can you articulate the benefits of VR meetings that are comparable to those of personal computers and that motivate equating the two?

Yes

https://lwn.net/ml/linux-kernel/202203161523.857B469@keescoo...

also - you disagree with the proposed solutions in the article (I do too), but I don't understand why you are disagreeing with the stated problem?

If speeding is contributing to fatalities, changing road designs to discourage speeding is a reasonable response. We don't have to claim that fatal accidents are not related to reckless behavior to make changes to discourage reckless behavior.

>> Fatal accidents are largely caused by reckless behavior — speeding, drunks, texters, and people who fall asleep at the wheel.

> This is just not really true. Every research on this suggest the opposite.

Can you explain?

In the US in 2020, 30% ( 11,654 ) of fatalities involved alcohol-impaired drivers. 29% of fatalities involved speeding (63% of speeding drivers involved in fatal crashes were not alcohol-impaired).

https://crashstats.nhtsa.dot.gov/Api/Public/ViewPublication/... https://crashstats.nhtsa.dot.gov/Api/Public/ViewPublication/...

What research suggests that fatal accidents are not largely caused by speeding, drunk driving, distracted driving, and falling asleep? It seems like just drunk driving or speeding are involved in close to half of all fatalities.

The true/false on that page indicates whether the instruction has “MXCSR Configuration Dependent Timing.” This is separate from their sensitivity to the data-operand independent timing MSR bit.

My interpretation is that all of the instructions in that list require DOIT set for guarantees of data independent timing

> a new model specific register (MSR) control enables data operand independent timing for the listed data operand independent timing instructions.

https://www.intel.com/content/www/us/en/developer/articles/t...

no, better not do this difficult and interesting thing because the motivations have always been mostly artificial and the problems that proponents claim it will address are better solved with other more realistic projects.

Here was the BIOS, when comes such another?

This is such an amazingly uncharitable response.

> I cannot possibly know all of the literature

Maybe this applies to other people too?

> They showed that vision could already outperform radar.

important to note that much like there is a wide range from bad cameras (“filmed with a potato”) to high resolution cameras, there is a wide variety of radars with different capabilities.

the radar unit in Teslas was pretty limited (basically designed for adaptive cruise control), and they showed that vision could outperform that radar (and have no interest in exploring non-vision approaches because “humans can drive with just eyes”)

These links are not just two simple bugs.

The first link is a report that the system becomes nonresponsive under memory pressure and a discussion of that report. In that thread, there was not really any agreement about whether this was a bug, let alone what the bug was, or what the fix would be.

The second wasn’t a bug at all, it was a patch proposed set of knobs to allow users to avoid the problem.

> if the largest share of mobile OS's is based on linux (android)

Android has had a variety of downstream patches over the last 5-10 years to address this problem. ChromeOS too.

I linked threads on LKML that are directly relevant to this subject, about how this (system becomes nonresponsive under memory pressure) is a real problem that people really experience, with a lot of people agreeing that it is a problem and suggesting various mitigations. Most of those ideas presuppose that memory pressure leads to stalls and are about figuring out how to detect when the system is stalled and making no progress and killing processes after it has gone on for a while (often with userspace daemons). I think MGLRU is maybe getting merged in linux 6.x and will hopefully help avoid the stalls.

you linked a list of all CVEs in macOS. I don't see how this is relevant at all.

We do know by now, which is why the LKML thread I linked is titled "the elephant in the room."

see also:

https://lore.kernel.org/all/d9802b6a-949b-b327-c4a6-3dbca485...

https://lore.kernel.org/all/20211130201652.2218636d@mail.inb...

by "freezes", 'deeter72 almost certainly means that the user interface becomes unresponsive, which is not relevant for servers.

windows has policies that prioritize maintaining user interface and foreground app responsiveness.

note it’s probably a lot less effort to add support for M2’s GPU than starting from scratch and having to reverse engineer everything.

So eventually the gap between hardware release and fairly complete driver support could close quite a lot.

this (and the barrel shifter being available in all instructions) was at least partially due to the limitation mentioned in the article that the processor had no data or instruction cache. If single instructions could have these extra capabilities, the processor could do more work between stalling waiting to read the next instruction from memory.

IIUC Linux upstream requires contributions have the real name of the author in the signed-off-by, and Asahi Lina seems a lot like a pseudonym (otherwise a very extremely fortunate coincidence as a name for someone working on Asahi Linux), so I wonder if the patches will get a new signed-off-by before going upstream or if they’ll be able to be merged as is.

https://www.kernel.org/doc/html/latest/process/submitting-pa...

Does this actually work?

My impression was that most typical inverters used in home PV installations have (required) anti-islanding safety features where they only output power if the input waveform (from the grid) looks good. It seems like manually islanding the home at the breaker would just look like an outage to an anti-islanding inverter and it would still shut down, so wouldn’t you also need an inverter with a manual switch to disable anti-islanding? Or how would the anti-islanding inverter detect that the home has been manually disconnected from the grid?

It looks like the change is setting oom_score_adj for Firefox processes, so IIUC Firefox won’t use less memory, just direct OOM kills better.

this simplification to “everything needs matrix multiply and GPUs are matrix multipliers” doesn’t really match the actual architecture.

the hardware for low-precision matrix multiplications in ML is mostly independent of the hardware that’s typically utilized for vertex and fragment shaders in computer graphics. It really only gets used for graphics if using DLSS. It’s not used at all for (integer) computations in cryptomining.

Are they for high-precision scientific simulations because it’s possible to multiply matrices on them? These cards are probably quite shit at double-precision matrix multiplications.

another option that IMO is worth mentioning in this list is writing code using parallelism features in standard languages (e.g. C++20 algorithms with std::execution::par) and having a compiler compile it to run on whichever target.

> Important disclaimer: This isn't about 'just a pretty syntax,' it's about fixing semantics

Smaller instruction set and shorter reference manual aren’t necessarily good attributes. The risc-v reference manual is short because in part because it is has terse-to-vague descriptions of things (not great for a specification) and because the ARM ARM specifies a bunch of things which are omitted from the RISC-V architecture spec, which either implementors will have to design themselves or the RISC-V org will eventually add in a revision or extension spec (e.g. Zicbom, Zicboz, Zicbop)

has EVGA ever sold AMD or Intel GPUs?

AFAIK they haven't.

or Amon Hen.

but anduril is the company name and makes other things besides the towers.

It’s a September record, not a summer record.

The previous record for September 1 and all of September was 100 degF.

The record for June is 107. The record for July is 107. The record for august is 106.

I had in mind that OpenMPW-1 was not quite full, and looking now on efabless.com I see 37 projects submitted for MPW-1.

but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)

> It was impossible to change the program of an Intel 4004, the program was written in the ROM when the memory was manufactured.

This is not accurate. If you used a 4001 ROM as program memory, then it can’t be changed, but this is a property of the system, not the processor, and intel made the 4008 and 4009 memory interface chips to enable using standard RAM chips as program memory for the 4004. The 4004 also had a WPM (write program memory) instruction that could be used in these situations.

I don’t understand why you are adamant the 4004 is not a microprocessor but the 8008 is. The 4004 is weird and clearly designed with some instructions specifically because it was targeted for a calculator, but that doesn’t mean it had “nothing to do with general-purpose programmable computers.” It was programmable and had a sufficient instruction set to be used for general purposes. Intel could have made a true fixed function chip just for the calculator, but they decided to made a cpu instead.

The last 3 or 4 openmpw shuttles have been full.