pbalcer

But would have prevented many players from actually enjoying Blizzard games. Personally, I am not interested in purchasing an Xbox or installing Windows on my PC, even if the merger is finalized.

By cloud gaming they probably mean things like Playstation Plus and Xbox Game Pass, because, in the higher tiers, they come bundled with streaming access to the games in the service.

And then there's the SSD controller, which yet again tries to maintain the illusion of efficiently supporting random I/O. For software that tries to get the best possible performance of the physical media, avoiding the OS and controller overhead, it's definitely important to maintain data in sequential blocks. In fact, NVMe ZNS [0], doesn't even allow you to do random writes.

[0] - https://zonedstorage.io/docs/introduction/zns#overview

Astera Labs have a commercial version of this that works through CXL (assuming you have a platform that supports it :-)), meaning you can actually have load/store access to the memory instead of using the block interface.

https://www.asteralabs.com/applications/memory-expansion/

The host binary will include intermediate representation of the compute code to be compiled by the device driver. This already exists, see SYCL + SPIR-V. Intel's oneAPI is one implementation of this approach.

Samsung Odyssey Neo G9? It's pricey, but I think it ticks all your boxes.

I recommend looking at this presentation from Oracle for an example of the benefits of PMem: "Under the Hood of an Exadata Transaction – How We Harnessed the Power of Persistent Memory"

https://www.youtube.com/watch?v=ertF5ZwCHP0

> This is basically an SSD without all of the complexity of wear leveling.

With all the benefits of an enterprise SSD (EDSFF in most cases) form factor. And that's what data center folks want.

> not likely to outright replace DDR in most consumer computing devices

Right. I expect that CXL will initially be deployed as an internal transparent optimization for cloud providers and large data centers, with the latency and complexity (to an extent) hidden at hypervisor/orchestration layers. Some sophisticated software might have special support. Eventually we might get S3-like disaggregated memory services for cloud instances enabled by pooling (pure speculation on my part).

There's a significant momentum behind CXL [1]. Samsung already announced a CXL DRAM module [2]. From where I sit, it's all but inevitable that this technology will get broader adoption, at least with large CSPs. Its benefits are just too good to pass up. The extra latency is estimated to be no worse than a NUMA hop [3]. Many companies are already figuring out how to best deal with the more complex memory topologies that CXL will enable [4, 5].

But I'm biased (I work for Intel), so take what I say with a grain of salt.

[1] - https://www.computeexpresslink.org/members

[2] - https://news.samsung.com/global/samsung-electronics-introduc...

[3] - https://www.lenovoxperience.com/newsDetail/283yi044hzgcdv7sn...

[4] - https://arxiv.org/pdf/2203.00241.pdf

[5] - https://arxiv.org/pdf/2206.02878.pdf

Many things. Capacity, Bandwidth, Serviceability [1]. It also paves the road towards disaggregated memory [2].

edit: The official Compute Express Link (CXL) website has an article about the benefits of this technology [3].

[1] - https://www.nextplatform.com/2021/09/07/the-cxl-roadmap-open...

[2] - https://pmem.io/blog/2022/01/disaggregated-memory-in-pursuit...

[3] - https://www.computeexpresslink.org/post/the-benefits-of-seri...

Sounds like they have created a proprietary customer-oriented solution similar to zoned namespaces (ZNS) [1]. I wonder if other companies will follow, because there are some significant benefits. But hopefully they'd just use the open standard instead...

[1] - https://www.anandtech.com/show/15959/nvme-zoned-namespaces-e...

Average salaries from these types of aggregate reports are misleading since they are mostly representative only of the low-end local range. The median salary for senior engineers (5-10 years of experience) in Warsaw, according to levels.fyi, is 91k USD. I find that to match my experience in a different large city in Poland.

Certainly, that's why I responded. Tech salaries are becoming bimodal (or even "trimodal" [1]), and different types of companies are targeting different segments of the talent market. This skews the perception people have on what is actually a market rate, so it's important to spread awareness...

[1] - https://blog.pragmaticengineer.com/software-engineering-sala...

Depends on location and experience. 7k USD/mo gross is below market for senior/staff positions in larger cities.

According to levels.fyi, the median salary in Google Munich is 147k USD [1] whereas the median for Warsaw is 82k USD [2]. Central Europe salaries are still quite a bit lower, even if you can be creative with taxes. Those B2B contracts are not quite as prevalent as one might think - larger corporations typically don't use them. And, from my experience, you can get to an even better take home pay with a little bit of time and career progression.

[1] - https://www.levels.fyi/comp.html?track=Software%20Engineer&s...

[2] - https://www.levels.fyi/comp.html?track=Software%20Engineer&s...

For anyone interested in how databases can benefit from PMem, I suggest watching this fantastic presentation from Oracle's Jia Shi "Under the Hood of an Exadata Transaction – How Did We Harness the Power of Persistent Memory".

https://www.youtube.com/watch?v=ertF5ZwCHP0

It's been a feature for quite some time now.

https://www.youtube.com/watch?v=HkPSJc4Bi5o

There's a company in Europe, Saule Technologies [1], that is claiming to be already capable of large scale commercialization of perovskites. It seems you can even buy/license it (B2B). The article seems to suggest that the biggest obstacle for market-readiness for this type of product is endurance. However, Saule on their FAQ website are claiming that their products have an initial lifetime of several years [2]. I also found this article from MIT Technology Review [3] where it's stated that "Oxford PV, Microquanta, and Saule all say they’ve solved the stability issue, at least well enough to sell their first products."

So, who's right? Is the article overstating the stability problem or are these companies over-promising?

[1] - https://sauletech.com/technology/

[2] - https://sauletech.com/faq/

[3] - https://www.technologyreview.com/2021/06/29/1027451/perovski...

Isn't that CXL [1]? Serial-attached memory is coming very soon.

[1] - https://www.computeexpresslink.org/post/the-benefits-of-seri...

The authors of the article I linked to earlier came to the same conclusions. And so did the SPDK folks. And the kernel community (or axboe :)) when coming up with io_uring. I'm just hoping that we will see software catching up.

Right, I agree. I'd go even further and say that async/await is a great fit for a modern asynchronous I/O stack (not read()/write()). Especially with io_uring using polled I/O (the worker thread is in the kernel, all the async runtime has to do is check for completion periodically), or with SPDK if you spin up your own I/O worker thread(s) like @benlwalker explained elsewhere in the thread.

Thanks for sharing this article - I found it very insightful. I've seen similar ideas being floated around before, and they often seem to focus on what software can be added on top of an already fairly complex solution (while LSM can appear to be conceptually simple, its implementations are anything but).

To me, what the original article shows is an opportunity to remove - not add.

What I find interesting about the performance of this type of hardware is how it affects the software we are using for storage. The article talked about how the Linux kernel just can't keep up, but what about databases or kv stores. Are the trade-offs those types of solutions make still valid for this type of hardware?

RocksDB, and LSM algorithms in general, seem to be designed with the assumption that random block I/O is slow. It appears that, for modern hardware, that assumption no longer holds, and the software only slows things down [0].

[0] - https://github.com/BLepers/KVell/blob/master/sosp19-final40....

All x86-64 CPUs support 48 bit address space, with 57 bits in the newest ones [1]. It's unlikely that address space exhaustion would be a problem for the vast majority of use cases.

[1] - https://en.wikipedia.org/wiki/Intel_5-level_paging

I don't believe anything was announced publicly - sorry.

Disclaimer: I work at Intel on Persistent Memory

If you are asking just about the OS interfaces - you can already emulate persistent memory with DRAM [1], which allows you to play around with the programming model. There are also NVDIMM-N devices available on the market today that expose the same interface. IBM also has a product called Virtual Persistent Memory [2].

I expect that once CXL [3] becomes adopted, there will be more diversity in terms of Persistent Memory hardware vendors.

[1] - https://docs.pmem.io/persistent-memory/getting-started-guide...

[2] - https://www.ibm.com/downloads/cas/09ERZEVQ

[3] - https://pirl.nvsl.io/PIRL2019-content/PIRL-2019-Stephen-Bate...

OP here, yes - you are right, mea culpa. I'll try to correct that particular picture.

Thanks for pointing it out.

With the implementation of system-ram operational mode [1] of devdax, you can just use normal linux interfaces for allocation of huge pages [2]. Those then can be seamlessly utilized by most memory allocators, with no need to modify anything.

libvmmalloc has been superseded by libmemkind [3], which better allows you to control the behavior of what I just described.

[1] - https://pmem.io/ndctl/daxctl-reconfigure-device.html [2] - https://www.kernel.org/doc/Documentation/vm/hugetlbpage.txt [3] - https://github.com/memkind/memkind

That's an excellent question. The answer is that those type of libraries will work just fine for read-only workloads since you cannot mutate a data structure once you have serialized and written it out to a file. The best part is, this will work without any (or very little) modifications, as long as your application is suited for using mmap. All you have to do is to use a persistent memory resident file on a DAX file system.

If you need dynamic mutable state however, as great as these libraries are, you will need a more complex solution with memory allocation and transactions.