But can you edit a properly signed[1] PDF without breaking it? From an integrity perspective, that's what matters; otherwise, it's just inherently more portable until non-repudiation becomes relevant.
[1] As in not SHA-1: https://shattered.io/
4,146 karma · joined September 7, 2015
But can you edit a properly signed[1] PDF without breaking it? From an integrity perspective, that's what matters; otherwise, it's just inherently more portable until non-repudiation becomes relevant.
[1] As in not SHA-1: https://shattered.io/
> In OpenVMS Version 7.1, the DCL PIPE command was introduced.
Ask me how I really know OpenVMS v6 doesn't have pipes.
[1] http://h30266.www3.hpe.com/odl/axpos/opsys/vmsos84/6489/6489...
For all this talk of fat fingering, you failed to mention that a simple purge is all it takes for all that file versioning to disappear...and you don't even have to type out the whole 5 letters. Besides, file versioning != revision control, and there are modern interoperability nuisances with it too.
Perhaps the most annoying thing with VMS is it'll allow you to set default (equivalent to cd for those unfamiliar with VMS CLI) to a directory that doesn't exist without even a courtesy warning. It was so batshit annoying that I wrote my own implementation of cd in DCL to ensure that never happened, along with updating command prompt to reflect current directory (just like Windows cmd) and certain bashisms like ~ for home directory, etc.
> Oh, and OpenVMS doesn't crash. Like, ever.
Yeah, sure...not really.
The 7473 next-state truth table in this datasheet is symbolically misleading; the specified timing constraints on p. 4 make it a lot more clear, and it's consistent with IEEE Std 91 terminology cited.
To be sure, 7473 is indeed an edge sensitive device; IEEE Std 91 references this as the pulse-triggered flip-flop--a.k.a. master-slave flip-flop--and its description on page 1 of the referenced datasheet corroborates this (my emphasis):
> J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition.
In other words, the internal output of master stage is opaque, while slave stage output Q/Qnot does not change until the falling edge, which is quite distinct from the output behavior of a latch.
> To wit: For these devices the J and K inputs must be stable while the clock is high.
Reading the datasheet further, the 73A variant apparently improved upon the original 73 design by allowing for input change after the rising edge (i.e. while clock state was high) so long as the specified t_su = 20ns min setup time before falling edge was satisfied. Also observe the 73A's 0ns min hold time after falling edge in conjunction with no min CLK low pulse duration; this clearly allows for much faster operating speeds by exploiting clocks with greater than 50% duty cycle. In contrast, the 7473 was capped at less than 15MHz = 1/(t_whmin+t_wlmin) = 1/(20ns+47ns) per specified timing constraints.
P.S. Props for teaching yourself TTL as a kid. I recall my pops (who's in his 50s now, if that's any indication of my age) once tried explaining clocks to me as a "computer literate" teen and that went waaaay over my head at the time. The magical allure of it all ultimitely led to the whole EE thing today.
> A flip-flop is a storage element based on the gated latch principle, which can have its output state changed only on the edge of the controlling clock signal.
I also just pulled out my Fairchild Pocket Designer Guide (published circa 1985; inherited from a retired former colleague) which explicitly differentiates 74/54 series flip-flops from latches both in section and symbology. So there's at least 35+ years of industry convention without citing standard.
To cite one industry standard, from ANSI/IEEE Std 91-1984[2] § 4.2.1:
> Cm should be used to identify an input that produces action, for example, the edge-triggered clock of a bistable circuit or the level-operated data enable of a transparent latch
...or from § 5.9:
> The symbol for a bistable element (for example, a flip-flop) does not contain a general qualifying symbol. ... When a bistable element is controlled by a C input (Symbol 4.3.7-1) it is necessary to indicate whether this element is a latch, or an edge-triggered, pulse-triggered, or data-lock-out bistable.
In fact, symbol 5.9-2 labeled "D-type latch, dual / Part of SN7475" is distinct from symbol 5.9-7 labeled "Edge-triggered D-type bistable / Part of SN7474"...the former being what the blog discusses.
So no, this designer begs to differ.
[1] 3rd Edition, § 7.7 Summary of Terminology
Let's assume a 40kg super mirror was made from the same base silica[1]/tantala[2] substrate as the legacy mirror. Let's also assume 50% distribution by mass.
That's a (20kg/60.08g/mol)+(20kg/441.893g/mol) ~= 378.1mol tetris endgame.
So if we took this analogy quite literally and wanted to build 1 mirror in 10 years, you'd have to play precision atomic tetris a mere 17 orders of magnitude faster than this guy[3].
Not going to lie...sure does make watching grass grow sound a lot more pragmatic.
[1] https://en.wikipedia.org/wiki/Silicon_dioxide
From there, you can either suffer digesting via watermarked-to-death PDF iframe, or download a copy of the unadulterated PDF for offline review.
They've listed 24 standards, but F1494 is a duplicate entry, and D5733 isn't actually linked to in their reading room (perhaps because it's a withdrawn standard). So really 22 standards avaiable.
Would be interesting to learn how other disciplines have applied such a tool to solve real-world problems.
Come again?[1][2]
> it takes an NMR machine to know differently
Does it really?[3]
[1] https://www.fda.gov/files/food/published/PDF---Guidance-for-...
[2] https://www.accessdata.fda.gov/cms_ia/importalert_108.html
[3] http://www.aoacofficialmethod.org/index.php?main_page=produc...
If I specified sheet aluminum for Type II Class 3 chemical conversion per MIL-DTL-5541, any materials QC professional would be hard pressed to visually determine that anything was actually done to the material.
To be sure, no, MIL-DTL-5541 isn't an uncommon spec constrained to military applications.
[1] https://www.alligator.org/news/uf-engineering-team-wins-mill...
1. Is the change in this new revision easily identifiable via PCB silkscreen from its deprecated variant, or will consumers be 0402 resistor hunting?
2. Are (US) authorized resellers shipping this revision yet? None of the 8 for the US appear to have any notice on their respective websites.
EDIT: The Register article[1] cited by the blog mentions the following almost-but-not-quite-relevant tidbits:
> The update, Upton told us, had also moved "the WLCSP SD card voltage switch to the top side" to protect it from damage, and also "silk screen tweaks to reduce solder bridging in manufacture".
> We asked Upton this week if the fix was out and he confirmed the update had indeed been rolled into a PCB Design for Manufacturing (DFM) process. He added that he would have expected the update "to have reached end users by now".
In any case, this toy detail was intended to snuff out the grandparent's presumption that 10x error in any arbitrary parameter is obvious. The difference between 6061 and 7075 is offered as a simple thought experiment in that they're both common alloys in industry, yet difficult to discern one from the other despite the latter having a zinc composition that's 20x greater in the best case (6061 = 0.25% max; 7075 = 5.1-6.1%; 20 ~= 5.1 / 0.25) as specified by ASTM B209[2].
Fact of the matter is a contractor was responsible for a build-to-print submarine. A particular drawing specified something-or-other with an off decimal value that escaped human detection during multiple engineering design reviews. Contractor had something-or-other manufactured to the exacting detail specs in said drawing and no doubt was able to provide supporting documentation in the form of material certificates of conformance and lot testing results...but all the precision instrumentation and manufacturing quality control in the world amounts to nothing if the basis of truth is fundamentally flawed...and it certainly didn't help that the only effective opportunity to detect catastrophic design error (not that it's a build-to-print contractor's responsibility to identify such subtle faults) was spot validation of a system-level key performance parameter that wouldn't have been possible until the entire system was fully assembled.
[1] https://www.nist.gov/system/files/documents/2019/12/03/00-20...
If I gave you volumetrically equal pieces of 6061 and 7075 aluminum--whose difference in density is ~4%--would you be able to intuitively sniff out that something was off? What if those pieces were several tons a piece and your calibrated industrial weighing equipment had a reasonable +/-5% margin of error?
Besides, if you're walking into a time-constrained exam of toy questions, I fail to see what incentive a student may have to corroborate toy answers against a reality that it may or may not be an approximation of.
EDIT: Here's a 1992 GAO acquisition study[1] on the AN/BSY-1 combat system whose development started in 1980 and was an absolute clusterfuck for the Navy in the decade that followed, as history would have it. I originally learned of this disaster from a former sailor (and now good friend) who participated in sea trials for one of the submarines that this system was installed in. By his account, the submarine had had its hull recut just to get the system installed and routed properly, and it never really worked as intended. The study vaguely alludes to this:
> As a result, the shipbuilder was eventually faced with rip-outs, recutting of hulls, and rerouting of cables.
Electric Boat was the prime and responsible for system integration. They've had their fair share of glorious fuckups to the tune of $82.4MM in late 80s dollars, so it's funny to read the hero part on how they've "helped other countries with their submarine programs".
In the right professional circles, stories like these quite literally abound. Now what's the probability of learning about them without the internet?
p. 28: Console teletype sometimes gives two line feed for the price of one.
p. 29: REJOICE! PDP-10 COMPATIBILITY IS HERE NOW!! ...EXCEPT FOR UINS5, WHICH DOESN'T SEEM TO APPRECIATE THE GLORY OF THE NEW ORDER, ALL NON-PORNOGRAPHIC POGROMS WILL WORK AS BEFORE.
p. 31: GLORIOUS PROGRESS MARCHES ON!!
p. 34: BUG WORKS AGAIN. TROUBLE WAS CAUSE BY SOME J. RANDOM BENEDICT PLUGGING TWO THINGS INTO SAME INPUTS.
p. 34: TTY3 STAYS AT LEFT MARGIN & PRINTS BLACK RECTANGLES. I DON'T NEED BLACK RECTANGLES. YOU DON'T NEED BLACK RECTANGLES.
p. 36: "It's a NonExMem", said Steve haltingly.
p. 44: <something?> is not a bug, it is a feature!
p. 50: DOOM!
p. 51: The stupid brushes are worn out AGAIN (so soon?) on the mag tape. Some idiot carefully hid the spares. Probably said idiot should replace them. Perhaps someone should send a bomb to DEC or at least find out why we go through brushes so fast.
p. 52: We have no bananas?
p. 66: MORE GLORIOUS PDP-10 COMPATIBILITY (AND OTHER GOODNESS).
p. 67: OVER FOR BIG MSG. --> p. 68: TTY2 DON'T WORK WORTH SH!T
p. 81: FIX THESE GOD DAMNED TELETYPES!!
Characteristic impedance alone is all over the map, Apple apparently couldn't align its 3.5mm jack pinout with the rest of de facto industry, and form factor is just one of many inherent market differentiators.
HP didn't even extend a courtesy reach-around for our CS/CpE brethren with 16c integration despite their $16.99! Even if you were in the market circa 2011 to pre-order one (or a few) 15c LE--which came with a copy of the desktop app--you'd still have to pony up even more for the mobile app!
On Android, I'd highly recommend skipping the "official" HP garbage and supporting CalcTastic Plus[1] for a mere $0.99. Even the free version makes the HP emulator look like a complete joke. I've been rolling with a 35s as workhorse since undergrad days, but couldn't care less if today's zombie HP literally disappeared from the market tomorrow.
[1] https://play.google.com/store/apps/details?id=com.shaytastic...