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marcux95

17 karma · joined October 23, 2021

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Tiny-Vedas: RISC-V Infrastructure for AI Accelerator Design [pdf]

siliscale.com·1 pts·marcux95·
0

Tiny-Vedas: a generic accelerator interface for RISC-V, from PyTorch op to GDS

github.com·2 pts·marcux95·
0

My Mental Sanity Script on OpenWRT

gist.github.com·1 pts·marcux95·
1

ECC SystemVerilog Generator

github.com·7 pts·marcux95·
0

How to Compile a Large Language Model (LLM) to RISC-V

siliscale.com·4 pts·marcux95·
0

RISC-V Processor Design – Lec 6 – EXU and Co-Simulation

5 pts·marcux95·
1

RISC-V CPU Design – Lec 5 – Design Top Level and Testbench, Instruction Decode

youtube.com·3 pts·marcux95·
0

Lecture 4 of how to design a RISC-V Processor available [video]

youtube.com·3 pts·marcux95·
0

New free course on RISC-V processor design on YouTube

youtube.com·5 pts·marcux95·
1