DHaldane

It's ok to build a compiler sometimes -- it's just very important to make that choice intentionally

This is an old story, rehashed without new information.

That 7nm chip from SMIC is what prompted the export controls -- nobody thought they were close before that.

I've found the same thing - a little syntax example, some counter examples and generative AI does well generating syntactically correct code for PCB design.

A lot of the netlists are electrically nonsense when it's doing synthesis for me. Have you found otherwise?

Have you tried using more 4000x more samples?

https://redwoodresearch.substack.com/p/getting-50-sota-on-ar...

I've found that for speeding up design generation like that, most of the utility comes from the coding approach.

AI can't do it itself (yet), and having it call the higher level functions doesn't save that much time...

I promise that we want to stay a software company that helps people design things!

Adding Skynetn't to company charter...

Agree that PDF digesting was the most useful.

I think Gemini could definitely do that microphone study. Good test case! I remember spending 8 hours on DigiKey in the bad old times, looking for an audio jack that was 0.5mm shorter.

Right - LLMs would be a bit silly for these cases. Both overkill and underkill. Current approach for length matching is throw it off to a domain specific solver. Example test-circuit: https://x.com/DuncanHaldane/status/1803210498009342191

How exact is exactly the same time? Current solver matches to under 10fs, and I think at that level you'd have to fab it to see how close you get with fiber weave skew and all that.

Do you have a test case for a schematic design task?

I doubt it too, but I notice that I keep underestimating the models.

Do you have a challenge task I can try? What's the easiest thing I could get an LLM to do for circuit board design that would surprise you?

My gut agrees with you that LLMs shouldn't do this well on a specialty domain.

But I think there's also the bitter lesson to be learned here: many times people say LLMs won't do well on a task, they are often surprised either immediately or a few months later.

Overall not sure what to expect, but fine tuning experiments would be interesting regardless.

Update: Sonnet 3.5 is better than any other model for the circuit design and part finding tasks. Going to iterate a bit on the prompts to see how much I can push the new model on performance.

Figures that any article written on LLM limits is immediately out of date. I'll write an update piece to summarize new findings.

It really depends on the type of question, but generally I'm between Gemini and Claude these days for most things.

That's an interesting question - I'll take a few pokes at it now to see if there's improvement.

I'll note that the bandwidth doubled from PCIe 4.0 to PCIe 5.0 (it's now 30GHz).

Dealing with that speed increase is causing a whole lot of problems for all the designers in the ecosystem. It's a bit of a nightmare, but people are for sure using it (in your laptops, in the data center).

We ended up adding some specific features/strategies to the autorouter we're building for to handle those speed. It was pretty hard to get right.

Without knowing exactly what you are working on, here are a few ideas:

1. Figure out if you can do fewer slow iterations. What's driving the need for a full PCBA run for each iteration? Might be able to split out to rigid assembly and flex for example.

2. Run more experiments in parallel. If you have multiple ideas or variations to test, design them all and fabricate them all. Flex antenna? Make like 30 parametric variations.

If design then becomes the bottleneck, then automate that next.

Fascinating technology - if I interpret it correctly it looks like you're replacing lots of manual pipetting with a surface that can scooch little drops around using electrostatics. And then do a bunch of stuff you can't do with a pipette like controlling temperature, mixing.

Have you found an increase in throughput from the device vs a human with a traditional wet lab? Or is more about saving bio-chemists some serious back pain?

Are there new experiments we can do now?

Thanks for the feedback -- very helpful.

Seems right - Renesas just acquired Altium after all. Varies a lot by customer.

Good set of questions, and thanks for the feedback. Currently updating the website to add this stuff.

Comments/answers to questions in order:

1. Yes, finding a single resistor is easy. Part solving is more about making parametric circuits possible. (like a buck regulator that can configure itself on SS, output voltage). There you need to calculate values from parameters and then go find a part you can actually buy. Doing that manually is less magical of an experience.

2. Yes - some example code here (have not documented yet, apologies) https://github.com/JITx-Inc/jitx-cookbook/blob/main/regulato...

3. Our customers are professional EEs doing really complex work (e.g. many 30Ghz SERDES), and our website is drastically out of date. Will update design on site soon - this post was some guy submitting our landing page to HN. I'm trying to keep up!

4. Yes, this works already. Was very hard to do on the product side, design code was relatively simple. DDR3 example here - https://youtu.be/bw4KxhV-d8g

5. Physical constraints are imported or generated - works quite well to automatically sync electromechanicals. Mutliple 3D models including STEP can be added to parts, again I need to update the website.

Welp - seems there are out of date parts of the website. We launched router last Tuesday so have to update that we are end to end now. Thanks for the pointer!

Thanks Mike! We're still in VSCode -- thank you for kicking off that very first extension.

Hey - you got this very correct. Good insights as to what we're up to. Grueling to build product for the pros, but once done it can support a lot of people.

Good automation can dissolve false dichotomies.

This is the classic SaaS CAD tool approach. But JITX runs locally - all design data stays local and we're not holding it hostage in our cloud.

Definitely agree with a free version though - we want to help those just starting out as well! But they needed the support from the router we just shipped so earlier offerings would have fallen a bit flat. In the cards now though...

Schematics ended up being a hard requirement, so we put in the work to generate good ones automatically and the tools for EEs to adjust the aesthetics without ruining the correctness of the design.

You are right that the schematic becomes visualization/documentation here - it's not necessary to generate, because the only information it technically provides is a netlist which we already have from code.

But it's needed documentation. In practice it's helpful to use as you debug your design code.

Thank you. Talking to EEs that do this every day I hear "Well this would have to save me 1 day per month to be ROI positive".

Turns out saving that day is incredibly hard, because the professional workflows are intense.

Value of the product ends up being non-linear: either you're valuable enough to be in an EE's regular workflow saving time, or you're not. Worth a whole lot once you are, worth next to nothing if you are not.

Good catch - we can add some clarification to that form.

Today JITX is for professional EEs mainly, and we don't have a lot of resources to help people learn electronics from scratch. (Still want to help the students though - this company was inspired by my grad school robotics struggles).

However a code-based approach boosts reusability enough make open-source hardware a whole lot more meaningful. So we selectively grant access to people able to use the tool effectively today who are also going to contribute to open source.

Overall, we're opening up more and more as the tech moves from special purpose to general purpose.

Right - "none of the other tools try to integrate nicely, so if we support it well it must be necessary" is the thought to address.

Thank you for this comment! Would you pretty please help me debug my website - what makes JITX seem like a CAD plugin?

(it is a freestanding tool)

We are certainly focused on the professional market for monetization -- turns out this software is hard to build and we need to pay smart people to work on it.

Not to say we won't have an open free/freemium offering soon. Hobbyists needed the new layout tool we just shipped last Tuesday, so it's much closer now.

Thanks! We're working hard -- I just added that animation this morning and I have a few more to do.

I like your perspective on tackling the biggest problem. We can show a lot more of how users have been doing automation for firmware, docs, testing, etc ...

An underrated part of an autorouter is that you can enforce rules for DFM (and SI) automatically, so some of that tougher stuff is addressable with the right approach. Including a lot of compliance.

Certainly not trying to shrink the fun part - tried to make layout more of an optimization tool than a drafting tool. Although "I should not be doing this" is a mentality a lot of EEs bring to layout.