If you owned a printer and you reduce the size of your printing by half (in each direction) you quadruple your efficiency - it is an area equation, not a linear ine. I'm surprised that slipped past Wired...
> Shrinking gate lengths have meant 30 per cent more transistors per year for the same-sized fleck of silicon (transistors are laid out in a two-dimensional array, so gate-length scaling improves density in two dimensions).
I'm guessing they deliberately went with a not 100% accurate statement just to get their point across more elegantly - especially since the statement is still correct if you take "font size" to mean "font area" (even though that's not the typical understanding of font size).