I remember doing this stuff in my computer architecture classes, Xilinx is incredibly powerful but also incredibly painful to use.
I am amazed with the functionality of the free version of ISE (both in simulation and floor plan design). I have used this software to prototype and implement a 3rd order pipelined sigma-delta modulator on a FPGA, and several simple CPLD projects which didn't require simulation.
The simulator is far from crippled. I was able to read input from a binary test vector file into the simulator, run it though the model, and save the output to file. I found this very useful during development to compare the VHDL implementation with the prototype I had written in C.