Not only that, but the early ARM architecture was terrible at running unix or other non-single address space OS's.
If I remember correctly, the caches were virtually tagged, even on the StrongARM, making context switching on linux very expensive.
If I remember correctly, the caches were virtually tagged, even on the StrongARM, making context switching on linux very expensive.
salem is referring to how addresses are compared in the cache: http://en.wikipedia.org/wiki/CPU_cache#Virtual_tags_and_vhin...
you are referring to ASIDs which are the mechanism by which different address spaces can share space in the TLB at the same time: http://www.helenos.org/doc/design/html.chunked/mm.html#id253...