Agreed, this is both too little and too much in the same Kickstarter.
So there is a pretty nice FPGA + Dual ARM9 chip, the Zyng7020 which is used in the Parallela and the Zedboard[1]. This has a pretty decent amount of FPGA fabric, and it could use an open source frame buffer to go along with the core. One of the hugely annoying things about Xilinx parts is that their design flow is insanely over complex.
That said, the comments here and elsewhere point out another interesting dichotomy. There are people who want a fully open Tegra4, and there are people who just want a frame buffer they can program. The latter is an undergraduate FPGA project, the former is a multi-million dollar team effort.
When the two groups talk about what needs to be done there are heated arguments of 'too much' or 'too little'.
These folks seem to have a design already "done" (in the sense that they have used it for some customers), I'm wondering if a more effective path might be to team up with Xilinx or Altera to put together some IP that that can be part of their design suites for free that would enable non-corporations to implement a decent frame buffer. That would just be a port of what they've got and perhaps some design notes around it. Get Digilent to build a demo board and poof, your good to go.
[1] www.zedboard.org