I think 10 years ago, Ericsson had a highly available server machine for Telecom application, named Jambala. It had 2 SPARC and 2 x86 CPUs. Having two different ISAs in the same system can protect you from subtle software/hardware errors. So you compile you code to both targets, if for some reason one of x86 CPUs fail, the second x86 takeover, if both x86 fail, then SPARC CPU takeover, etc.
Off-course this system run Erlang/OTP ;)
Then there are several that have lower level "programmable microcode" kind of level in the hardware, ranging from the Transmeta stuff to mainframe-era writable control store...
I was discussing about installation time, which only prevents situations were you make use of code rewriting tricks, which are anyway frowned upon in the day and age of read-only code sections and no-execute data sections.
Putting a link here for those that want to follow up.
http://staff.science.uva.nl/~poss/posts/2013/08/01/mill-cpu/
It would be cool if both the ARM and the x86 cores could use the same GPU.