ahh - I see where my dots weren't connecting, then.

I pictured having a current driver on each plane, so the data bits coming in would be enable bits for the current drivers. Which obviously means 18xQty current drivers.

I think you're describing having one big current driver for the whole job, and then data bits drive the inhibits to counter them.

I guess I'm looking through too modern a lens - pumping 18*600mA into the write cycle, plus (up to 18)*600mA into the inhibit, sounds insane to me (hitting 20A for a write) - but I can see that multiplying the current drivers may have sounded nuts in the 50s.