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the more chips you have, the more complex the project becomes. BOM is one thing, every chip needs support passives and oscillators, but now you also need to coordinate communication between the chips, you need to devise a way to update firmwares and access both chips for debugging purposes... that might be worth to trade off for less battery life.

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in my experience they are not that much difference between 2 design. The BLE FW is a binary blob that you will download at boot with 2 chip-design, or load it to correct address with single chip-design.

From the CPU perspective, they are the same

From a PCB layout and supply chain perspective, it’s a big difference.

> in my experience they are not that much difference between 2 design.

Depends!

If the two chips use UART or SPI for intercommunication, okay, you need two lines between the CPU and two GPIO lines for wakeup, and JTAG can be shared anyway.

But if you use stuff like shared memory, or want to do stuff like updating the display not just from the high-power chip but also from the low-power one, suddenly design becomes much more complex.

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