Scanning an electron beam, repeatedly over an entire waffer would take forever. So instead we do it once, to make the mask, and that mask is then used over and over to expose the waffer.
This is a bit little injection molding: the mold is very expensive and made with a far better manufacturing process than the plastic pieces that it will eventually produce, but this is the price to pay for high volumes and low costs.
2-3 wafers per minute would be 120-18 wafers per hour - did you mean wafers per hour for both?
That said, apart from the economics (it is very slow), you are also constrained with respect to the size of what you can write, the writing fields is typically quite small, if you want to make a chip larger than that you need to stitch fields together and you have to deal with stitching errors (which becomes more and more difficult the smaller your structures are).
It also doesn't tell you as much about how your design actually runs on the process in question.
1.5B transistors in a current intel core chip
300 die per wafer
150 wafers an hour
That means each litho tool prints 6.75 x 10^13 “transistors” per hour. In more useful units, that’s 18.75B transistors per second.
Drawing them one line at a time is technically feasible but…I’ll bet you are talking single digit DIE per hour if that.
And that is for one layer of lithography. I’ve seen estimates from 5-20 layers of lithography using EUV tools at the 3-7nm nodes. So the time scale is even more warped.