Author here, When I joined InCore last year, I decided it would be meaningful to redesign my Undergraduate Capstone Project using Bluespec SystemVerilog (An InCore superpower) and contrast the efforts + compare the implementation with the legacy Verilog codebase.

This blog is an account of the same, with a walkthrough of the design, comparison results and steps to replicate.

Link to the GitHub repository: https://github.com/govardhnn/Low_Power_Multidimensional_Sort...