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Comment by thiago_fm | Hacker News Reader

Is there an advantage on going 2nm given the costs? Maybe somebody can clearly answer this here on HN, I love this subject!

It's interesting how the whole valuation of TSMC(and some from NVidia) are aligned by their current advantage on the 3nm process.

Intel on 18A is literally TSMC's 3nm process + backside power delivery, which means more power efficiency, performance also less heat.

It's definitely what they need to get them back into the processor game and beat everybody, maybe we will see Apple doing designs with the Intel factory before 2030?

Hope they don't fail their deadlines: summer this year to be producing 18A, and 2026 mass production.

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>Intel on 18A is literally TSMC's 3nm process + backside power delivery, which means more power efficiency, performance also less heat.

That's a pretty serious abuse of the word "literally" given that they have nothing in common except vague density figures which don't mean that much at this point.

Here's a line literally from the article

>Based on this analysis it is our belief that Intel 18A has the highest performance for a 2nm class process with TSMC in second place and Samsung in third place.

Given what we currently know about 18A, Intel's process appears to be less dense but with a higher emphasis on performance, which is in line with recent Intel history. Just looking at the density of a process won't tell you everything about it. If density were everything then Intel's 14nm++++ chips wouldn't have managed to remain competitive in raw performance for so many years against significantly denser processes. Chip makers have a bunch of parameters they have to balance when designing new nodes. This has only gotten more important as node shrinks have become more difficult. TSMC has always leaned more towards power efficiency, largely because their rise to dominance was driven by mobile focused chips. Intel's processes have always prioritized performance more as more of their products are plugged into the wall. Ideally, you want both but R&D resources are not unlimited.

The death of Dennard scaling means that power efficiency is king, because a more power efficient chip is also a chip that can keep more of its area powered up over time for any given amount of cooling - which is ultimately what matters for performance. This effect becomes even more relevant as node sizes decrease and density increases.

If it were that simple fabs wouldn't offer a standard cell libraries in both high performance and high density varieties. TSMC continues to provide both for their 2nm process. A tradeoff between power efficiency and raw performance continues to exist.

A standard cell can be a critical performance bottleneck as part of a chip, so it makes sense to offer "high performance" cell designs that can help unblock these where appropriate. But chip cooling operates on the chip as a whole, and there you gain nothing by picking a "higher raw performance" design.

If that were totally true you would expect to see more or less uniform ratios of HP/HD cells mixes across different product types, but that's very much not the case. Dennard scaling may be dying but it's not dead yet. You can still sacrifice efficiency to gain performance. It's not zero sum.

What product types do you have in mind exactly? Even big server chips now use a huge fraction of their area for power-sipping "efficiency core" designs that wouldn't be out of place in a mobile chip. Power is king.

Those efficiency cores would put a full core from just a few years ago to shame, and data center chips have always contained a majority niche focused on throughput and perf/watt over latency. That's nearly always been focused on somewhere closer to the 45° part of the scurve than more on the top.

AMD Zen5?

For datacenters and especially hyperscalers, the power and cooling bill is a huge part of the TCO.

You make somewhat more power efficient chips, you get to sell it for a lot more.

Your chips are inefficient, and you won’t be able to sell to a hyperscaler even for $0.

The latter is the position Intel is quickly arriving at for DC; Epycs are much more efficient and Intel’s wildly slashing prices.

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For Apple, A-series dies are pretty small, they basically prefund a large part of TSMC and almost certainly gets the lowest prices of any customer.

That said, Apple’s strict fascination with always jumping to the latest node, even when it seems premature, puzzles me from the outside.

> That said, Apple’s strict fascination with always jumping to the latest node, even when it seems premature, puzzles me from the outside.

As a user of M1, M2 and M4, that's why I've chose Apple.

I would have gladly jumped to any laptop that supports Linux with similar power and battery life and weight/build, unfortunately that computer does not exist.

Is it time to call on garmin to make a computer? They've beat apple on the watch. I have faith in them.

You need high chip volumes to justify the NRE cost of going to 2nm, or you're selling your chips with very high margins (ie. Nvidia).

Just saw this podcast: https://www.youtube.com/watch?v=hvQvrLjlJN8

CEO of ASML, he sees a path for the next 5-15 years for a 2 year cadence of transistor scale doubling. That's a bit slower than 18 months, which it was earlier.

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