There is a little bit of industry usage, with the biggest user being SiFive - the founders come from the UC Berkeley group that developed Chisel.
Also, VexRiscv has some industry presence.
There is a little bit of industry usage, with the biggest user being SiFive - the founders come from the UC Berkeley group that developed Chisel.
Also, VexRiscv has some industry presence.
do ask sifive how much they regret that decision though <shrug>
When I've started doing FPGA consulting a few years ago I've started using Chisel, but eventually had to go back to SystemVerilog due to client reluctance.
I was dramatically more productive with Chisel than with SystemVerilog.
i didn't say that as a supposition - i know that they regret it. the chisel compiler has been an enormous (enormous) technical debt/burden for them because of how slow/resource intensive it is.
compared to what?
It's not like all the other EDA tools are really fast or not resource intensive. For smaller design firms I would think things like FireSim [1] would be a significant advantage.
I can imagine it is a disadvantage in other ways, i.e. it's only possible to do single phase positive edge synchronous design, which could be an impediment to high performance digital design.
But I wouldn't imagine that scala performance is particularly significant.
[1] https://fires.im
> But I wouldn't imagine that scala performance is particularly significant.
Imagine all you'd like - reality is much less imaginative though.