XiangShan – Open-source high performance RISC-V processor | Hacker News Reader

XiangShan – Open-source high performance RISC-V processor

github.com

270 pointsgjvc98 comments

If anyone wants to play arround with simulating it, here is a Dockerfile I use:

    # Dockerfile
    FROM ubuntu:24.04

    RUN apt-get update && apt-get install -y build-essential clang libclang-dev llvm-dev cmake libspdlog-dev vim git curl wget time default-jre default-jdk
    RUN git clone --recursive https://github.com/OpenXiangShan/xs-env
    WORKDIR /xs-env
    RUN sed 's/apt\S* install/\0 -y/g;s/source /. /g;s/sudo //g' -i ./*.sh
    RUN . ./env.sh && sed 's/\/master/\/master/g;s/$/; cd \/xs-env/g' -i ./update-submodule.sh && ./update-submodule.sh


    RUN . ./env.sh && ./setup-tools.sh
    RUN . ./env.sh && . ./install-verilator.sh
    RUN . ./env.sh && sed 's/^git submodule.*$//g;s/env.*$//g' -i ./setup.sh && . ./setup.sh

    RUN . ./env.sh && make -C XiangShan init
    RUN . ./env.sh && cd DRAMsim3 && mkdir build && cd build && cmake -D COSIM=1 .. && make -j 8
    RUN . ./env.sh && make -C XiangShan emu CONFIG=DefaultConfig WITH_DRAMSIM3=1 MFC=1 -j 8

    RUN . ./env.sh \
        && sed 's/unknown-//g;s/rv64gc/rv64gcv/g' -i $AM_HOME/am/arch/*.mk $AM_HOME/am/arch/isa/*.mk \
        && sed 's/define MSTATUS_FS.*$/define MSTATUS_FS 0x6600/g' -i $AM_HOME/am/src/*/isa/riscv/boot/*.S


    WORKDIR nexus-am/apps/hello
    RUN make ARCH=riscv64-xs

    # $NOOP_HOME/build/emu --no-diff -i ./build/hello-riscv64-xs.bin 2>/dev/null

Make sure you have 64GB of RAM. I only had 16GB, but allocating additional 48GB of swap worked.

There are probably some redundant steps, but this worked for me last time I tried.

why so much ram?

64GB of RAM isn't that much for full chip simulation of a "high performance" CPU.

yeah I'm super ignorant here, wondering, say you simulated this, could you run a VM OS against it? What kind of scale it it, personal computer or server (i7/xeon)?

Or you just use it to compile programs against it?

edit: I did skim the readme, I saw verilog makes me think FPGA

You could simulate this on an FPGA platform, those aren't going to be cheap to hold a large design. Usually by running simulations on a PC you're just running very specific test cases.

I've run CPU simulations on machines with 64GB of RAM before and it took several hours just to get to single-user shell in Linux. Different CPU design and computer, but the point is it's not something you'd typically use interactively.

Interesting do it actually runs that's cool vs. a hyper visor which idk the difference but yeah

If you're simulating a complex CPU's HDL in Verilator then think in terms of single digit thousands of instructions per second. Vs single digit billions of instructions per second when it's made into an SoC.

i.e. on the order of a million times slower than the final product.

On an FPGA you might get 20 to 50 million instructions per second, only 100 times slower than the final SoC product. But for a large modern OoO design you'll need an FPGA costing $15000 (for a VCU118) or even more.

That's a pretty huge amount of RAM even for a high performance core. The medium performance cores I've simulated use more like 300MB.

I suspect it is the Scala compilation that requires all the RAM rather Verilator or the simulator.

Maybe, I've never used Scala before. But in my experience simulations are way more resource intensive than compilation.

No, the RAM is mainly used by verilator partitioning simulation logic to multiple threads. The Scala part (Chisel -> FIRRTL) runs pretty happy with a few gigs of RAM.

That's the HDL, and not the inherent design complexity.

The 64GB is for compilation. simulating does take almost no RAM. I can have 12 seperate instances simulating at once and take less than 2GB:

https://i.postimg.cc/XqnhcXX1/1-1.png

Compiling the chip, right, not the code?

yes

Wow, it's surprising to me there's a huge difference and in that direction. I always used to increasing resource requirements for synthesis->P&R->logic simulation->full chip simulation. I guess times have changed since I worked on chip design.

This project is the first that tickles my brain in the right serendipitous ways; it merges topics of my recent interests.

However, after a VERY short perusal, I grew a giant sense of empathy for non-native English speakers. The readme is gentle enough to English speakers (aka: +95% English) no less I felt like I muddled through renaming tokens in my mind as I went. However, that quickly showed me two things.

1. It reminds me why I never seem to finish classic Russian literature… so often get lost in the introductory parade of names that are a cache miss for my usual set of names.

2. This is perhaps a significant cultural muscle that has never been necessitated for English speakers. Since the earth has largely been using English (in some capacity) for significantly longer than my life span - as my favorite joke says in the punch line “what do you call someone who only knows one language… uni-lingual… jk: American”

PS: it seems like there could be an open registry maintained by “Americans like me” who would rather pre-process the code for tokens within the docs and src… seems like a “DefinitelyTyped style” definitions registry would be very niche, but SUPER useful.

> as my favorite joke says in the punch line “what do you call someone who only knows one language… uni-lingual… jk: American”

"Another thing to keep in mind, when you get to feeling bad about being monolingual, is that the fair question is not 'how many languages do you know?' It is, 'of the languages spoken by five million people or more within a thousand miles or so of where you live, what percentage do you know?'"

https://structuredprocrastination.com/light/biling.php

> of the languages spoken by five million people or more within a thousand miles or so of where you live, what percentage do you know?

IRL interactions are just one aspect of life. Pretty important, sure, but it’s not the only important thing.

Lots of the heavily multilingual people in the world also have a lot of irl interactions that necessitate knowing languages other than their mother tongue. Of course that’s not the only reason to learn languages, but it is both common and effective. So in terms of expected number of languages spoken I think it’s a good baseline.

In the case of the US the languages that would meet that criteria in most parts of the country would be English and Spanish. But there are also hierarchies around languages, ie people that speak the more dominant languages are less likely to speak the less dominant languages, but the speakers of the less dominant languages are expected to speak the more dominant languages and suffer higher consequences if they don’t.

and the joke about the heavily multilingual people is that they will speak 9 languages,none of them fluently

I prefer to view it as "what's the likelihood that, with your current knowledge of languages, you're able to communicate with any person you may presumably want to speak to in the future."

This is why it's so much easier to only speak English than it is to only speak another language.

> This is why it's so much easier to only speak English than it is to only speak another language.

It’s pretty easy to only speak German within the DACH countries. Huge online communities as well that speak German.

I’d wager it’s similar for several other large languages, e.g. Spanish or Chinese, OTOH they are even larger, OTOH they probably don’t have the same advanced dubbing industry that we have.

I am Spanish; we have a very strong dubbing industry and pretty much all movies have been dubbed since forever. In fact nowadays we usually get two dubs, one for Spain and one for LATAM, with serious online fights about which one is better xD

Oh interesting, I heard that it’s almost never the case that people are so attached to dubs as here, where people often don’t really care about the original voices and instead about the dubbers, which might even get movie billing.

> one for Spain and one for LATAM

What’s the difference there for someone who is only bilingual (English and German)? :D

There's a bit of variety in the vocabulary used between LATAM and Spain, and honestly even between LATAM countries there's variance.

An example that comes to mind, as a first year Spanish student (I'm doing my best but fact check me because I'm very much still learning!) with a Latin wife, is "el carro," which means car, and is common in some Spanish speaking countries but others might use "el coche" -- I believe this dialectic difference even exists within Latin American Spanish speaking countries!

There are differences in pronunciation too but that obviously doesn't apply to subtitles

Regarding "car", there is a third option: "auto", which if I am not mistaken, is the preferred word in the Southern Cone.

But yes, it is mostly a difference of vocabulary, accent and pronunciation, and also how or if to translate the names of characters and the movies themselves.

As a Southern Conesman, can confirm.

> of the languages spoken by five million people or more within a thousand miles or so of where you live, what percentage do you know

By that metric you shouldn't feel bad for not speaking Russian in most of Russia, or for not knowing the most common languages in your immediate surroundings in large swaths of Africa (i.e. most Bantu languages would be excluded).

The essay is a bit tongue in cheek, but I think that was basically the point.

https://github.com/OpenXiangShan/XiangShan-doc/blob/main/doc...

The list of fused instructions is kinda weird; besides the ones that correspond to SH{1,2,3,4}ADD anyway, I don't think I expected any of the others.

I don't see a mention of Sifive-style short jump predication there either, though I'm using Google Translate.

Does RISC-V org itself list/document suggested insn fusion sequences anywhere? I can't quite figure out whether they do because the technical wiki they use is quite hard to navigate and search, and their unofficial Github repos are not much better.

You might find this[0] reddit thread useful.

0. https://old.reddit.com/r/RISCV/comments/1hnm5y1/where_did_th...

That's talking about the list of pseudo-instructions, which are just special-cased assembly mnemonics for a single RISC insn. I'm wondering whether there's also a documented list of suggested fusable sequences, comprising multiple insns each.

You'll find that a lot of them are equivalent to a sequence of -i.e. more than one- instructions.

Refer to the "base instruction" column in the pseudoinstruction table[0].

0. https://github.com/riscv-non-isa/riscv-asm-manual/blob/main/...

The ISA spec itself suggests one fusion - that of mul and mulh (lower and upper halves of n-bit * n-bit -> 2n-bit product).

The only other source I know of was this 2016 paper that suggested specific macro fusions. https://arxiv.org/abs/1607.02318 This predates the B extension so some of those fusions are dedicated instructions now, but I suppose Xiangshan still implements them for the sake of software that was not compiled with B enabled.

I posted a link to this project a few weeks ago as well! It's really interesting to see an academic project like this one.

For people interested, there's bi-weekly blogs (some in English) linked here: https://docs.xiangshan.cc/zh-cn/latest/blog/

I like that the microarch names -- Yanqihu (雁栖湖), Nanhu (南湖), and Kunminghu (昆明湖) -- are lake-themed. Coffee lake? Skylake? no, Kunming lake.

https://en.m.wikipedia.org/wiki/List_of_Intel_codenames

It important to be aware of the significant progress that China is making in AI, robotics, and processors, and admirable that they are open sourcing so much of it.

It’s great work and an inspiration

Quite possibly the open-sourcing is a part of the success story. The Chinese culture is built around incessant reproducing and gradual improvement, which dates back at least to the times of Confucius. Some think it's mindless copycatting, but it's more about learning deeply and then standing on others' shoulders. It's the "fork this" attitude that meshes quite well with open source, but is understandably infuriating for IP-licensing / patents crowd.

This doesn't mean that the openness extends easily to those outside China, its culture, and especially its language though.

I don't see that much opensource coming from china.

For example the popular arm rockchip offerings are so bad at contributing to mainline linux or even sharing documentation that the single person supporting them dropped it due to lack of fund and being unable to get any contact to share documentation.

IMHO, chinese opensource does at best the same thing many western companies do:

Opensource the things that are not you secret sauce/income, or things which would benefit you if people adopt them.

With the added caveat that china in generally is notorious for not abiding by patent laws and copying.

Indeed, the Chinese often violate open source licenses and outright steal proprietary code from non-Chinese companies.

Huggingface rings a bell? 80% is coming from chinese reaearch.

I suspect that Rockchip has better documentation in Chinese, which may be not easy to locate if you're not fluent in Chinese and are not inside China.

Upstreaming the kernel support has never been a breeze for any ARM designs, IIRC. But the custom kernels are GPL [1], aren't they?

[1]:https://github.com/radxa/rockchip-bsp

> I don't see that much opensource coming from china.

What you don't look for you don't see. I see a huge contribution in OSS from contributors based in China.

I think many companies in China have a different relationship with IP. They realize that people copy from each other, they will gladly copy from others and expect them to do the same, yet they realize that being hard-to-copy gives them a competitive advantage.

In the west, being hard-to-copy often just means slapping a proprietary license on your software and not worrying about much else. THe "source available" model is a prime example, the software is trivial to copy in theory, but everybody knows there would be legal consequences, so nobody serious actually does it.

In China, this doesn't work, so you have to obfuscate your code, build anti-reverse-engineering protections etc. This is similar to how the gaming market works in the west.

There are plenty of great writeups on reverse-engineering Chinese apps and hardware, and their reverse-engineering protections are often far more elaborate than what those same apps would have if made by western companies.

Loongson did pretty well in getting Loongarch64 upstreamed in all kinds of open source projects

>The Chinese culture is built around incessant reproducing and gradual improvement

all successful cultures are, they're just divided on whether they admit it or not. Germany was late to industrialization and a lot of our businesses went to Britain under the pretense of doing business and copied chemical plant factory layouts one-to-one, but we like the "we're the country of engineers and thinkers" story much better than "we were a bit slow and ripped the British and French off".

The Chinese just don't pretend. I've spent a lot of time in China and around FB's attempted Snapchat acquisition in tech circles there used to be the joke that FB is the most Chinese American company because of Zuckerberg's relentless copying. The valley works the exact same way, they're just more likely to pretend everything is the result of some boy genius making it up.

I hope China don't follow all these IP/patents. They have harmed more imo.

Isn't RISC-V FOSS to begin with?

The instruction set is, not necessarily the implementation.

That said, an open ISA certainly invites people amenable to open-sourcing their implementations, which is why more exist for RISC-V than for x86 or ARM.

If you try and make an OSS implementation of either, even using parts of the ISA where all the patents have expired and you will still get sued.

The purpose of RISC-V was to have a boring, unencumbered ISA that everyone could freely implement. It was a patent play, not a technical advancement.

Here is a commercial product using the older 'Nanhu' architecture by XiangShan. Doesn't seem to be released yet, but interesting nonetheless!

https://milkv.io/ja/ruyibook

What’s the strategy in open sourcing this?

They presented at HotChips 2024: https://www.youtube.com/watch?v=4_R0S6piLA0&t=2114s

There, one of the things they mentioned was that they were hoping that RISC-V in general, and their cores in particular, becomes a platform for academic research. That way, cutting-edge things are shared in the open and the industry benefits globally.

The optimistic view of this is that it's hoping for a better future for all. The cynical view is that open source is much harder to sanction/export control. The truth is probably somewhere in the middle.

The strategy is to do PR for China, market for adoption (to break chip duopoly), get contributions (free work), and build momentum to a point where the tech is commoditized (so they can be immune to sanctions).

then that's a good strategy. It's about time the world takes on western dominance.

Other motive could be to undermine western dominance in chip design. You give away free a good enough thing that is competing with your competitor's moat. If the gap is not that significant this can ruin the business for your competitor.

You can see the same with Apple and all big tech funding OpenStreetMap for example vs Google Maps. Even decreasing income for the competitor is worth it strategically. Or Satya Nadella saying in an interview that if ChatGPT just makes Google's costs higher for search is a big win for Microsoft.

Yep. Once espressif gave us the esp32 with 50 cents each we completely forgot about arm etc.

Realistically, it's probably the group inside the Chinese Academy of Sciences wanting for a larger impact factor for their review, similar to all other state sponsored researching institutes.

Universities always make things open source. I also make everything open source that I make for the university.

It's because you cannot make money with it anyway and the university often allows it, so then it's really good for your CV.

In Europe there is also a lot of stuff open source, and I can honestly say there is no plot by the government to destroy the United States. I don't think Linux is a plan by the Swedish government to destroy the USA.

Most Chinese people in my experience also don't really have any country outside of China on their radar, unless they are in some trading business. China is just so huge compared to for example the US, they really live in their own bubble. It's not something they think about on a monthly let alone daily basis is my personal experience.

And if you want to do a commercial spin-off from your university work, it might be easier to put it all out as MIT/BSD/Apache and then start a completely independent company than to deal with all the paperwork.

This makes life easier for competitors, so it's definitely a tradeoff, but it's the right tradeoff in some circumstances.

> This makes life easier for competitors,

I think this is greatly overstated. Generally it's just sheer volume of capital and dedication to building a business that dictates market advantage, not any given persons' knowledge or know-how (though that's obviously worth paying for if you have the capital). I'd argue the primary reason why proprietary ownership of software exists isn't to make life harder for competitors but rather to make it harder for folks to figure out what they're actually paying for and bypassing the fees to actually fix (let alone improve) the software.

> I don't think Linux is a plan by the Swedish government to destroy the USA.

Linus comes from a family of ethnic Swedes, but he was born and raised in Finland, the Swedish government had nothing to do with it.

I thought he was of Lapplander extraction?

Cool to see another project using Chisel. Anyone in the industry know what direction things are moving in? Seems like Verilog and VHDL are ripe for disruption. I remember one of them as outright unpleasant from university.

What has changed that they are now ripe for disruption? My BSc thesis supervisor runs a company that tries to disrupt Verilog and VHDL and they've been at it for well over a decade. I don't think they're making much of a dent yet but I didn't keep up with the space: https://github.com/clash-lang/clash-compiler. There's also a RISCV implementation written in it.

All the tooling in this space is so expensive to build and expensive to verify, with such a small market that it seems almost impossible for something to ever challenge the incumbent ecosystems in a reasonable span of time.

Bravo guys! Tremendous piece of work.

Free hardware is the dream. I want to replace the proprietary, DRM-bloated CPU on my PC yesterday.

I wonder what 'high performance' means in that context. So far, RISC-V has been rather underwhelming in regards to performance when compared to ARM or Loongarch (3A6000).

That's simply not true. RISC-V cores, SoCs, and boards perform very comparably to even better than Arm devices with similar µarch e.g. SiFive U74 vs Arm A55, SiFive P550 vs Arm A72, THead C906 vs ARM1176.

While Arm CPUs have existed for 40 years, the initial RISC-V spec was frozen and formally published only in mid 2019 and most of the CPUs currently available to buy were designed around that time.

This is quite normal. For example the Arm A76 core that features in the latest Raspberry Pi 5 and RK3588 boards (Rock 5, Orange Pi 5) was announced in May 2018, and took until 2022/3 to be available in consumer SBCs. The A53, A55, and A72 had similar time spans from announcement until being available in SBCs: Pi 3 / Odroid C2; Odroid C4; Pi 4.

Only in November 2024 was a RISC-V ISA spec suitable for high performance phones, laptops, desktops, servers frozen and published: RVA23. Cores meeting this spec and with expected performance comparable to Arm A78 up to maybe X2 have been announced, but it will be several years before they are available in products.

RISC-V is simply very very new. It is doing very well in the markets which it currently addresses.

I found these useful:

"The latest version of XiangShan achieves a normalized score of 45 at 3GHz on SPECint 2006. With the performance comparable to ARM Neoverse N2, it is the highest performing open-source processor to our knowledge."

https://riscv-europe.org/summit/2024/media/proceedings/poste...

https://hc2024.hotchips.org/assets/program/conference/day2/2...

Great, considering the project does not end at V3, and V3 is already competitive.

They will continue to improve the performance.

Check out my comment from a couple of month ago: https://news.ycombinator.com/item?id=41331786#41331968

TLDR in RTL simulation XiangShanV3 out-performs my current desktop (Zen1) per cycle in the tested scalar benchmarks by 2x. It's probably closer to 1.5x on regular code.

This roughly matches the reported SPECint2006 scores:

    * XiangShanV2: 9.55/GHz
    * XiangShanV3: 15/GHz
    * Zen2 [1]: 10.5/GHz at boost, 9/GHz at base frequency (closest to Zen1 I could find)

For comparison:

    * Cortex-X1: 15.73/GHz
    * Apple M1: 21.69/GHz
    * SiFive-P670: >12/GHz
    * SiFive-P870: >18/GHz
    * TT-Ascalon: 18-20/GHz
    * Akeana 5300: 25/GHz

Note that it's hard to find SPECint2006 scores for modern x86 or Arm cores because they all use PECint2017.

The final clock frequency obviously also has a big impact, but XiangShanV3 target 3GHz which is quite decent.

Reply on news.ycombinator.com