It was a combination of issues. Intel needed to be able to supply quite high voltages (at the right moments) to reach high enough clock speeds to win benchmarks with their desktop CPUs, so they couldn't implement a simple conservative, safe cap on the maximum voltage that would be requested. Their attempts to build an on-die voltage regulator (DLVR) repeatedly failed, leaving Intel relying exclusively on a different voltage regulator mechanism than they'd originally planned for. And then they seemingly did a sloppy rush job of characterizing how the chip behaved with their fallback voltage regulator strategy, and messed up the code controlling that system.
There were many steps at which Intel could have avoided this outcome, but it started from the fact that Intel had to push voltages and clocks beyond reasonable limits to make up for having a microarchitecture with poor enough performance per clock that Intel needed to hit 6+ GHz to be competitive.