Hacker News Reader

Comment by Neywiny | Hacker News Reader

This is like, barely risc-v. As far as I can tell, there's a risc-v management micro, an esp32 that I'm not easily finding a part number for so may as well be Tenscilica, and an app processor that's ARM based. I don't understand the GPU chip if you have the app processor, and I don't understand the management micro if you have custom ESP32 firmware. And a lot of SoMs have WiFi + Bluetooth on board. So I also don't understand the ESP32. This really feels like it could be a card-edge SOM, battery, HMI, and modem. As per usual I find this project needlessly complicated and buzzwordy.

View on HN

I was just wrapping my head around on how do they even run linux on the RISC-V microcontroller they use. Turns out there is a separate ARM for application processor.

Yeah. As I'm sure you're aware, you can get Linux capable RV. I mean you can build mmu-less as well but there's plenty of I think it's M extension cores out there. This isn't that. This is a design that happens to use at least one RV core and happens to be capable of hosting a modem card. It's not a RISC-V mobile phone.

From what I can tell, the RISC-V processor handles all of the phone functionality in a way that's almost entirely decoupled from the app-module/smartphone features. The phone part has its own firmware and drives the screen separately from the app-module. They added a green indicator light to show when the RISC-V "core" is using the screen vs when the app-module is.

The graphics processor is probably just for when the RISC-V core takes over the screen, as well.

What's the purpose though? You can put your own code on the app processor too. I don't know Android kernel dev but presumably with aosp you can do whatever the RV core does either in the A class core or using one of the many SoMs with built-in M class cores.

> an esp32 that I'm not easily finding a part number for so may as well be Tenscilica

On their dev board it's the usual esp32-wroom. They also say their esp32 firmware needs esp-idf 4.2, which doesn't support any of the risc-v esp32. So it is xtensa.

I agree that everything could be done with the esp32 alone (well, an wrover with extra RAM) but this project seems to be just a guy experimenting and having fun! Although I can see how someone might be cynical regarding this project being deliberately complicated/overengineered just to extract more money from the nlnet fund.

Great for experimentation, but that's where it should end. If this is a cash grab or anyone is seriously considering buying it I think better products do or could exist. They'd be easier -> cheaper to design, maintain, source and assemble. 3 chips to do what's already built into the SoM connector is unideal.

Reply on news.ycombinator.com