How can this change happen retroactively? Would motherboard manufacturers just need to update the BIOS to enable new XMP configurations? (For when this new, higher transfer rate RAM becomes available)
How can this change happen retroactively? Would motherboard manufacturers just need to update the BIOS to enable new XMP configurations? (For when this new, higher transfer rate RAM becomes available)
PRAC would need handling in the memory controller, so that would require a CPU update if I understand correctly.
https://stefan.t8k2.com/rh/PRAC/index.html
> Panopticon retrofits an existing signal in the DDR specification, called ALERTn, to effectively “trick” the memory controller to pause issuing new DDR commands. DRAM uses ALERTn to signal errors to the memory controller. Upon receiving this signal, the memory controller stops issuing new DRAM commands and instead re-issues the old memory access. By making use of ALERTn, Panopticon requires no modifications to any hardware other than DRAM itself.
(As I understand PRAC uses the same design as Panopticon for this part)
It doesn't mean that any particular combination of CPU/motherboard/RAM will work.
They only set the current standard, but allowed to, if technology progresses, that other speeds/timings would also be jedec compatible, rather than being some kind of XMP. Motherboard manufacturers do not need to upgrade their previous models if the hardware doesn't meet the required SN ratios, or whatever. But they _could_ if they believe they had the hardware to support it.