The arming process provides the key and once the single-use weapon hits the target, there's no way for the enemy to get to the original bitstream.
So the enemy can't reverse engineer any secrets that are part of the logic.
Can't do same with ASICs.
shrug I can't really say anything except that's not the only way to accomplish that sort of thing. And if it's a common enough use case that you need to build it into millions of pieces of ammunition, it doesn't explain why economies of scale never kicked in or a more purposeful custom part was never designed.
Limitless military budgets, by contrast, explain quite well why this /hasnt/ happened.
The cost of making a chip is proportional to the size of the chip and the process node, and that's the end of the story. FPGA and CPU quite literally cost the same to manufacture; it doesn't explain why the one categorically is priced 10 times higher than the other by die area, even in the long tail of the supply chain.
You can make latches with ASIC perfectly well. Or even more complex memory elements.
Unless you make an ASIC that's effectively an FPGA.
The benefit being highlighted is that the "executable code" of the system is stored in volatile memory. The same can be done for a more traditional software system.
To be fair, more people use the term ASIC wrong than right.
It seems unreasonable to me to cite the name "application specific" and conflate that to "single product." Nobody would debate that an Nvidia Tegra T20, for example, is an ASIC and yet it is contained within numerous products. An even more prevalent example would be any TI buck converter, used in a likely unknowable number of products.
I expect the level of application specificity needed to satisfy a particular view on ASIC varies by exposure and domain usage, which is why I think it's more like "firmware" than like "program" in a taxonomy of names. I also think that ASICs is a kind of parent group, members of which are things like microcontrollers, microprocessors, memory devices, FPGAs, and CPLDs. To draw such a hard contrast between "ASIC" and "FPGA" seems to not appreciate that an FPGA necessarily has fixed design elements (components, peripherals, etc.) to effect the function and provide more tight tolerance functionality like high speed signaling, which are limited resources by locality (only assignable within some bank of pins, for example).