But the step from 2 to 1nm shrunk gate pitch to 93.3% instead of the suggested 50%, a large 87% marketing hype. Or viewed as a shrink by only 6.7%, it's a whopping 600+% hype.
But the step from 2 to 1nm shrunk gate pitch to 93.3% instead of the suggested 50%, a large 87% marketing hype. Or viewed as a shrink by only 6.7%, it's a whopping 600+% hype.
Today, the industry has regressed to hyping tiny incremental gains in narrow sub-metrics which only rarely have a material impact on overall performance across an entire system or most applications and usually at higher cost. Those that entered the industry in the last 15 years don't really appreciate just how much progress has slowed to a crawl.
Sadly, looking at the ten year roadmap projections from the likes of IMEC, there aren't any big leaps on the horizon. Progress will come mostly in single-digit percentages and most gains will be increasingly conditional (eg limited to one logic type or only in certain contexts). And the costs are going to keep skyrocketing. I hope we'll "get lucky" with some unexpected breakthrough but there's no reason to expect that.
Except latency. RAM (uncached) latency managed maybe 3x (250ns in the 80s to sub-100ns these days)?
The only really significant latency improvement is spinning-disks to SSD.
I can't wait for the day when marketing nanometer figures blow right past atomic size and we're measuring feature sizes in quarks. By the time feature sizes DO actually get close to atomic size from an engineering perspective, marketing will be damn near the planck length.
We could probably get 2x as fast even today in multithread if we want but software hasn’t kept up in demand.
Instead, we are likely to start to get 2x as fast in AI accelerators every 2-3 years.