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Comment by mat_trw | Hacker News Reader

Using the fact MOSFET can only have two distinct states to prove that the binary positional system is superior to ternary is a bit like using the number of fingers we have to argue that decimal is the best number system to work in.

Not sure what the author was thinking when he wrote the paper but this is one of the cases where peer review would have helped him a lot to make less grand statements.

>Until tri-state transistors are mass produced binary encoding of numbers is the natural system for computers to work in.

From memory the Setun used vacuum tubes which could natively handle three states at the hardware level.

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The way we use transistors does not leave any room for tri-level circuits to be more efficient.

The high clock speeds we get rely on fast switching of power levels, this is generally done by targeting a voltage well beyond the switching threshold. The smallest transistors we produce generally have a big variability in amplification, they would be really bad for analogue circuitry, but in digital they just have to amplify enough, and it is ok if some of them amplify way better than that.

Now consider tri-state, we have to target a voltage in the middle band if we are to produce the middle signal, so less room for over-targeting means slower switching. We probably also need to supply the whole circuit a higher voltage to make proper room for the signal levels, that is a big L in efficiency.

One could build a circuit with three levels of input current, but that ends up more or less doubling the transistor count, so not an obvious win. I guess that is what the Setun did. If adding this complexity to a tube doesn't increase its cost much I guess that makes sense, but in the transistor world it is just a doubling.

Well, the way we use CMOS logic is like this. But we have a bunch of other logic families inplemented with MOSFETs. Dynamic logic is seldom complementary. CML too. There's no reason to not have 3-state CML.

Ternary logic is used in data converters (Analog-to-digital and digital-to-analog) with succes. This is because these circuits are often differential, so for each 1 there is a -1 on the complementary side. Let's say it's a current steering DAC. For 1 the positive end will sink +1 unit current while negative end is sourcing +1 (effectively -1). We get -1 if we flip the positive and negative. 0 can be created by turning off the currents. The beauty of it is the 3-levels we created are inherently linear, which doesn't extend to higher bases! The DAC unit in this example is in logic terms a CML ternary inverter! It doesn't consume any power when in 0 state, so it improves CML power cobsumption too (>50% for uniform data activity).

Now we established that it is possible to implement ternary logic: why is it not used? Because CMOS logic only consumes power during transition (dynamic power) while CML consumes quite a bit higher static power always. Actually CML can work at much higher speeds but it's gobe out of fashion because Moore's law till recently gave more transistors in the same area operating faster than the previous generation. When the Moore's law is died a slow death we went for increasing the die sizes by doing more in parallel than faster logic, because for complicated reasons CMOS is quite efficient when operating much slower than the speed limits of technology. This being said, there might be areas CMOS logic can be replaced but people don't do it because they don't think about the possibility. At least this is my observation in the field.

So you suggest transferring a trit using 3 wires. Wires for data transfer already take up a tremendous amount of space in a lot of CMOS logic.

The primary point of CML is that a differential signal is interference resistant. Therefore it can be used for higher data rates in out-of-chip buses. It does not provider faster ALUs than CMOS.

CML is mainly used for the speed. In a dense logic circuit interference doesn't matter that much since local routing is short. For the high speed clock generation (not only routing) and logic of high frequency data converters it's used because you can get 3-4x more speed compared to CMOS logic. If the Operation frequency is so high it's worth to switching to CML. That being said, my expertise isn't in ALU design but in data converter design for chip-to-chip interconnect. So you might be right that it doesn't result in a faster ALU for whatever other reason. I'd love to know why though.

CMOS logic can also be differentially routed, and often is routed against interference. That + a full shield around sensitive routing like clock lines are standard practice. Both have the advantage of cobtaining the return current too.

I'm not suggesting we switch to 3 wires for ternary. That would be stupid. Ternary CML is 2 wires. 10, 00, 01 with 11 being the forbidden state or having the same functionality of 00. This isn't efficient from routing perspective compared to single-ended CMOS.

For large routing distances any kind of encoding can be used. I often use 2 dimensional (row-column) encoding/decoding for multi-GHz data busses travelling over long distances (like 500um to couple of mm). It's very easy to calculate the power cost and routing area cost of not using any emcoding with respect to doing an n-dimensional encoding (incl. the power and area of encoder/decoder). I even used a 3D encoding which reduced total routing channel area and power in a routing dense setup like 50%. Using a simple kind of coding like parity bit and multiplying the data with a random sequence is also used against interference but people often don't do this and regret it..

Anyhow, the point I'm trying to make is local logic and long distance routing are two problems with different optimization parameters.

> a bit like using the number of fingers we have to argue that decimal is the best number system to work in.

Fun fact unrelated to your main point: some ancient peoples counted on their knuckles, using their thumb to point to each one. This let them count in multiples of 12 (3 knuckles on each of 4 fingers), then use their other hand to count out multiples! You can count as high as 72 this way, which was great for ancient cultures oriented around highly composite numbers like 12, 24, and 60.

I like to believe this is true because it makes sense, but it was a theory invented in the 20th century to try to explain how they did math in everyday settings. We don’t actually know if it is true. We just know that they used base-60 systems.

Yeah, 60 was likely used because it divides by 2,3,4,5,6 and 10, 12 and 15. I imagine it makes dealing with fractions much easier.

Oh, good to know!

> some ancient peoples counted on their knuckles, using their thumb to point to each one.

I don’t know how “ancient” you’re talking about: my mother (b. 1937) used such a system and taught it to us as kids. FWIW she grew up in south east Asia.

Can’t you count as high as 156?

12 knuckles/finger segments, incrementing by 1 on the left hand for each completed counting of 12 on the right = 12 * 12 + 12 = 144 + 12

I may have misunderstood the proposed counting method however.

I was wondering, can't you count to 144 (12 x 12) using two hands using this knuckle counting approach?

Or 169 (13 x 13).

I mean, even without knuckles you have 10 bits to play with. If you also curl your toes, that's 12 bits. So an average person could count to 4095.

I actually figured out how to count up in binary on my fingers and you can get way higher if you use your thumbs for the lowest two bits, and bent fingers as bits differentiated from a fully extended finger. All the way to 262,143.

A variable resistor has only 2 values where the power dissipation becomes negligible, when the resistance is null or infinite.

Therefore any transistor, triode or any other controllable device has only 2 states, i.e. on and off, where the power consumption is negligible.

Any kind of logic circuits that use transistors or triodes that stay in any other intermediate states between on and off (like in analog circuits) would consume too much power and would overheat. A MOSFET can have any intermediate state between on and off, the current through it can be varied continuously as a function of the gate voltage, but it will dissipate a great amount of power in any of the intermediate states. There is no difference from this point of view between MOSFETs and vacuum tubes. Setun just had too few and too big vacuum tubes to worry about the power consumption.

The kinds of logic circuits where not all transistors or triodes are on or off have been abandoned 40 years ago and there is no chance for them to ever come back, because at the current component densities their power consumption would be enormous.

The only way to use devices with more than 2 states in logic circuits would be to use devices with a variable reactance, for instance varicap diodes, because those do not consume active power.

However the devices with controllable reactance cannot use DC power supplies, they need AC power supplies, which creates a lot of problems for which there are no known solutions at this time, so nobody has designed yet a complex logic circuit based on controllable reactances instead of transistors.

As long as electronic devices with DC power supplies will be used, binary logic is the only kind of logic permitted by the energetic constraints.

Only in the non-volatile flash memories, multiple values of electric charge can be stored in a capacitor, because it does not consume any power for storage.

> Only in the non-volatile flash memories, multiple values of electric charge can be stored in a capacitor, because it does not consume any power for storage.

DRAM also uses a capacitor to store data so it could support more than one bit per cell too.

That is unlikely to work because the DRAM capacitor is lossy, the charge stored in it diminishes quickly and soon it would become impossible to guess which was the initial value of the charge.

Using multiple values for the stored charge would force a drastic reduction in the refresh time, which would increase the power consumption and diminish the read/write throughput.

> From memory the Setun used vacuum tubes which could natively handle three states at the hardware level.

That was the original intent, but they could never make it work reliably. The machine that ran had all the ternary logic implemented on top of the usual binary circuits (effectively wasting one state out of four).

Seems pretty relevant to me, based on the fact that transistors in switching mode are so superior to other computing technologies (see sibling comment for explanation of why) that all computers in recent decades are using it exclusively. And for those, paper's conclusions are valid.

A paper about high efficiency tri-level logic cell which is cheap and energy-efficient would be very interesting but sadly I don't think this is possible, at least I haven't seen one nor even have a clue about how one would go about making one. And I have been watching this area with interest.

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