It's good to know that my programs might need to be adjusted.
Chris Wellons [1] has an interesting post about using an explicit __ATOMIC_RELEASE and then __ATOMIC_ACQUIRE to tell thread sanitizer that there is definitely a happens-before relationship between threads.
[1]: https://nullprogram.com/blog/2022/10/03/
I have an idea: I would really like to layer an abstraction ontop of the memory model to formulate a protocol for interprocess/interthread communication. In other words, the cache coherency protocol IS the protocol for message passing. No locks!
My understanding is that memory_order_seq_cst or _ATOMIC_SEQ_CST in gcc C means all atomic operations in the same thread happens sequentially from the perspective of other threads.
This whitepaper ("How to miscompile programs with “benign” data races") discusses more about compiler optimisations breaking data races.
[2]: https://www.usenix.org/legacy/event/hotpar11/tech/final_file...