They're around 3 cents (yes, $0.03) a piece on LCSC: https://www.lcsc.com/product-detail/_BAT-WIRELESS-_C5137195.....
Unfortunately, if you're doing anything highspeed (>100MHz) or differential, then such vias (except at connectors) are highly frowned upon since they increase loading, crosstalk, imbalance, and reflections.
Too many people blindly accept generated footprints that are meant for machines and not humans. They are far too dense and have too little overhang.
For QFNs, adding about .4-.6mm of exposed copper extension to all pins can make both testing and hand rework vastly easier. In addition, extending the thermal pad far enough that you can easily hit it with a soldering iron often makes heat gun rework tremendously easier.
While this won't work for giant BGAs, you can often figure out how to extend exposed copper for up to about a 36 ball (6x6) BGA. For example, there are some wonky packages for power transistors that are basically 4 ball (2x2) BGAs. Running the traces out diagonally with some extra exposed copper helps for both soldering and testing.
How do you do this? The centre pad is surrounded by the smaller pins. Are you snaking it out the diagonal corners?
Sometimes the footprint is a DFN and the thermal pad can be directly routed out. That's the easy case.
A lot of the time, the thermal pad is GND. You can then connect the pad out through any GND pins. Quite often, if you need a thermal pad, there are multiple GND pins ganged right next to one another and you can route a tab out using them.
You can also put a piece of exposed copper on the back side connected to thermal vias that you can hit with a soldering iron. This is less optimal as it leaves an exposed copper pad on the opposite side of the board. However, if you have a lot of thermal vias attaching to the ground plane (ie. a LOT of thermal mass), it sure makes rework easier.
As a last resort, as you point out, you can try to sneak a trace out through the corner. That's generally less optimal as the trace size is pretty small.
The general lesson is "think about your footprints" and don't just blindly accept what the footprint generator gives you.
There are a lot of small "quality of life" things you can adjust on a footprint. Adding a line of silkscreen every 10th pin helps a bunch for debugging 100+ pin packages. Soldermask is a lot more accurate than silkscreen, so putting soldermask "L's" at the corners of your package helps for visual alignment. Putting pin numbers in silkscreen at corners is nice. Always sort your designators by X and Y. etc.
Machines will never notice, but humans sure will.
Most low-speed digital communication busses really need a series resistor inserted on their clock line for reliability anyway. If I'm on a prototype, I'll make those resistors 1206 which is plenty big enough to hit with test leads.
Most connector vendors have specialized connectors for test fixtures that last much longer (they are also a lot more expensive).