Edit - thanks for the answers - and yes it would make more sense for ASML to be worried, and TSMC to be happy to not have to use/power/maintain machine that shoot nano-drops of tin with lasers: https://www.trumpf.com/en_US/solutions/applications/euv-lith...
Last time I heard about this tech (~8 years ago, when it was nowhere near commercial availability) that was the obstacle. Since the mask comes into physical contact with each wafer there is unavoidable wear on the mask with each wafer (actually with each chip). So the mask life is a certain number of chips; then you have to make a new one.
In addition, isn't the cost of a mask in it's design, not it's production?
They tend to be in the same ballpark.
There's a feedback effect: if the maskset gets cheaper you can afford to do shorter product cycles (think "iphone 15.5"), now you've got two masksets each with half the engineer-years devoted to it. This lets you be a bit bolder with the design since the cost of screwing up is lower. If masks get super-expensive then you only do one maskset and you throw more design-hours into making damn sure it's correct, and spend more time adding in "chicken bits" -- ways to turn off features that you screwed up, without ruining the whole chip -- and fallback options or insurance-policy type stuff. So the design cycle will lengthen or shorten if the engineering cost is several times larger or several times smaller than the mask cost. They sort of balance out.
Also the design cost is often impossible to define exactly. Blocks from previous designs get reused, so you can't really "charge" the effort it took to design them to just one chip. All the major design houses write a lot their own CAD tools too, and these tools have decade-or-longer lifetimes.
This could been handled by careful selection of parameters - solution concentration, temperature, pressure, mechanical mixing, etc, but on each step of feature size, it become harder to achieve.
I have first education electronics engineer, and I seen broken PCBs, where these artifacts seen by naked eye.
If it makes sense for them, TSMC could buy it and use it to keep doing what they’re doing.
The key point is that it’s equipment used to manufacture semiconductor devices, and Canon would be competing with ASML rather than TSMC.
Because of EUV's insane cost / complexity, many older litho techniques (NIL, Direct Self Assembly) are making a comeback...NIL is a great option for lower cost patterning applications, like optical/photonic components (Magic Leap etc)
a) Too high a defect density
b) Too poor alignment between layers
to directly replace EUV