P.A. Semi didn't even exist in 1998. It was founded in 2003, and was acquired by Apple in 2008.
> Bits don’t change the processing power; they just change the amount of addressable memory
Now in my personal experience since the early 1980s, increased addressable memory is the biggest advantage for most personal computer workloads. (At least until software is rewritten to use 64-bit instructions) But there are definite processing power advantages too, and for the target market of DEC’s Alpha chip this was likely an important advantage.
There are three key bit widths that impact a CPU
Address bus: how much RAM the CPU could theoretically address.
Data bus: how many bits at a time the CPU can read from the RAM it can address.
Register: how much data an instruction can operate on at a time.
The author appears to understand only address bus width and may be influenced by early (valid, depending) complaints that the transition from 32 to 64 bit didn't benefit end users.
Going from 32-bit to 64-bit registers can provide a significant performance improvement. But only if you're doing math on 64-bit values. Without specialized instructions, 32-bit and smaller math won't improve due to the register width improvement.
Increasing the size of the data bus can provide a big performance improvement if the previous bus was narrower than the register width.
Many (most? citation needed) current, mainstream CPUs use the same bit width for all three (address, data, register).
The 8088 was notable back in the day because it had a 20 bit address bus, 16 bit registers, and an 8 bit data bus.
Edit: The Alpha had 64 bit registers -- it wasn't just a 32-bit register / data bus CPU with a 64-bit address bus.
This is quite wrong, for most x86_64 processors:
Address bus is 42-48 bits
Data bus is 32-128 bits
Registers are 64 bits but usable as 32/16/8 bits
Even on most ARM processors, neither the address bus nor the data bus are same width as either or the register width.
It’s very difficult to give just a single number for data bus width. Do you add all the DRAM channels? DDR5 has 2 x 32 bit channels where DDR4 has a 64 bit channel. What does bus width mean for PCIe, which uses very fast differential serial lines? Really, it hasn’t been a useful way to describe system performance since the 1990s.
OTOH the ill-fated Newton was also ARM-based. As well as the emate pseudo-laptop.