There were a few TTL ones available: 74x378 is one I used back in the day. It was easier to meet timing with parts like this. I used it for my PCI cards: it was part of a circuit that latched the address of PCI configuration writes- the only data that would make it to the board if the transaction times out. Why did I need this? To load the bits into Xilinx 4010E FPGA which held the full PCI interface, thereby avoiding the need for a Xilinx configuration PROM. After the design was loaded, the PCI interface would come alive and start responding to transactions.

This worked until Intel decided to save power by disabling the PCI clock on unused sockets: it means your device had better exist on the bus before the BIOS's PCI enumeration (actually this is not true- with the full bridge documentation I could enable the clock- but I didn't have it, and in any case, then the design would be chipset dependent).