8, 16, 32, 64 bit mov + add + sub + load + store. and/or/not/xor, blah blah blah
obviously it gets way more complex.
just curious “unlocking its potential”
i thought the primary benefit of risc-v is how easy it is to implement since it never gets into the more complex messiness that’s modern x86_64 and all of its extensions
RISC-V is permissionless, you just grab the specs and start implementing (or more likely, grab a free core off Github and start modifying it). So that's the difference here.
For extensions, RISC-V supports those in a somewhat more structured way. There's both an open process for ratifying standard extensions, and a reserved space for your own custom extensions.
Copyrights cover documentation, and may cover the names of instructions. But creating something that's interoperable with x86, and doesn't violate those copyrights, should be considered fair use. In the same line of copyrighted APIs vs. competing implementations of said APIs. Basically: make cpu that eats binary code of >20y old x86 cpu, use new names for instructions, and write your own documentation.
But of course recent, high performance x86 cpus are still covered by many patents.
So what's legal are competing implementations of x86 cpus released ~20y ago, not using performance enhancing technology covered by still-valid patents. To do what? No market for those.
Not to mention Intel & AMD have legal teams that could make the going tough for anyone trying to do so. Even if legally allowed.
A big advantage for RISC-V is being a clean slate ISA, meaning its design takes into account many issues that were bolted on ad-hoc in other ISAs (32/64 bit, extensions, virtualization, compact instructions, etc).
And being a modular design, you don't pay the power/area cost if you just need a simple core.
A really good introduction to RISC-V is designed, and why it is the way it is, by the original authors.
It left me with a very positive view of RISC-V, as well as reasonable knowledge of the ISA and ABI, which has since proven useful while writing/debugging assembly on the architecture.
Whether it's a universal good for the consumer or not is unclear. We could end up with significant fragmentation. But the compelling aspect of RISC-V is that companies can spin up their own cores to do all sorts of things without a lot of hassle with licensing. Either by writing one's own core or using an existing off the shelf one, and then tacking on whatever extensions or customizations that make sense for them
And thinking here far beyond what most people think of when they think of in regards to processors (phones, computers) but the fact that ARM cores are in practically everything these days from the MCU to the MPU level. Everything from light bulbs and ceiling fans to COVID tests to garage door openers to christmas lights or toys to drive and memory controllers to laptops and phones.
Think of all that diversity, and now consider what advantages a manufacturer can get by being able to roll up whatever they want, but still be able to use a common standard compiler suite, verification tools, skill set, etc.
RISC-V is the future, or at least a future. No doubt ARM and x86 will exist alongside basically forever, but RISC-V I think has crossed the point where it was a "maybe will be something" to a "it's happening" moment.
But yeah modern IP laws are clown cart of idiocy that try to kill competing on good product alone at every possible corner