"Emulation" refers to emulation of chip designs. When a chip has billions of transistors that are all connected to each other to perform higher level functions, you need to test out designs in order to make sure those higher level functions actually do what you expect them to. Most modern chip designs (at least the digital portions of them) are designed using what's called a Hardware Description Language or "HDL" such as System Verilog or VHDL. It's somewhat similar to traditional programming, except threads are nonexistent, so it's essentially an unholy bastardization of a markup language and a programming language. But I digress... These functions are then synthesized into their low level building blocks such as buses, gates, and registers, and are placed and laid out on a chip.
Going back to the part about billions of transistors; as you might imagine, testing of such designs must be rigorous and thorough. Only problem is that it's really, really computationally intensive. There are 2 ways of doing it: Simulation (CPU Based) and Emulation (FPGA Based) Simulation is slower, but yields more data like waveforms and whatnot (though you can get waveforms with emulation, but there are more limits.) Also, simulation takes less time to compile, since there's no place and route step.
I should also point out that there are 4 key simulation levels: Simulation Model (usually compiled C code) RTL Simulation (Functional level simulation) Gate level Simulation (simulating the individual gates) and physical simulation (where the transistors and trace routing are all accounted for.) Each level being roughly an order of magnitude more computationally intensive than the previous. Most time and engineering effort is spent on RTL level simulation, which is what can, and is often emulated on an FPGA, and why this product is so relevant to hardware designers.