It's more like an intepreter for x86, seeing as it is actually executed on a dataflow architecture.
It's more like an intepreter for x86, seeing as it is actually executed on a dataflow architecture.
Not sure what the distinction is but that's where it is to my mind
Compared to 'JVM JIT' or 'LuaJIT': there is no instrumentation to detect what is hot or not. The CPU frontend will crack x86 instructions into micro-ops, while looking for some patterns to merge certain instructions or uops into larger micro-ops. The micro-coded instructions (like many of the legacy instructions) are likely just lookups.
Most of this is my speculation, mind. Modern CPU frontends are still kind of a black magic box to me, but I think they are limited by relatively simple transformations by virtue of being on the critical execution path.
[0] - https://chipsandcheese.com/2022/11/05/amds-zen-4-part-1-fron...
It's not a magic arc profiling optimization either.