Edit: linked below, https://www.ims.co.at/en/products/ , says it uses 512x512 beams with a beam field of only 82um. Is that spacing between beams, or width of all the beams together?
The only route to economic viability is absolutely massive beam parallelism inside the tool. But at that scale, there's serious questions about accuracy/reliability. Just one out of hundreds of thousands (or millions) of beams fails for a microsecond and the chip is ruined. This is a problem that is effectively sidestepped for traditional litho -- the masks themselves are created by (slow) e-beam, but mask inspection tools ensure that the masks are perfect before they are actually used to process product wafers.
True, but this is more or less the same process for e-beam and photolithography (as I understand it). I don’t see a fundamental reason why one couldn’t replace one ASML EUV machine with, say, 1000 e-beam machines and run them all in parallel. You would need the e-beam machines to be extremely reliable, but they’re conceptually simple devices and this should be possible.
(With vague ballpark numbers from the Internet, an EUV machine appears to be about 10k times as expensive as a SEM. Building 10k e-beam machines at the same cost as one Alibaba SEM would be an interesting challenge, and there would be factors pushing the price in both directions.)
Fab floorspace is also very expensive, nevermind that's not even close to a realistic price per system (the factory interface alone costs $100k+)
There are a few dimensions of cost that can be optimized though, right? My understanding is that ASML is making ~10s of these EUV machines per year because of the extreme complexity of many components.
E-beam certainly does provide a bounding limit on how expensive EUV can get, but we're not in danger of hitting that limit anytime soon.
I expect that EUV will become cheaper/more productive per dollar in the medium term, unless ASML starts acting uncomfortably monopolistically (and it's probably in their interest to drive EUV adoption to starve out Nikon and Canon, anyway)
You could imagine chips that are engineered for redundancy / defect resistance, but that would make them a lot less performant so it's highly questionable whether that can be justified by any cost savings on litho.