Hacker News Reader

Comment by xnx | Hacker News Reader

It's been a great run for the past few decades getting improved performance for "free" (i.e. through extremely advanced CPU engineering), and I'm glad they're still able to eek out another generation of hardware improvement. Curious how hitting limits/diminishing-returns in silicon will force innovation in architecture and software. Will be amazing to see the pendulum swing back toward software optimization. So much performance is being wasted or left on the table.

View on HN

N3 is actually much worse than expected, it’s essentially a marketing node to satisfy contractual obligations and the expected gains from N3 won’t actually be reached until N3E in another year+.

This means that Samsung’s 3GAP/2GAE (both with GAAFET) will match their density and release timeline…

https://www.semianalysis.com/p/tsmcs-3nm-conundrum-does-it-e...

https://twitter.com/david_schor/status/1608434897193951232

https://twitter.com/SKundojjala/status/1552561057050177541

https://fuse.wikichip.org/news/7048/n3e-replaces-n3-comes-in...

https://www.anandtech.com/show/17356/tsmc-roadmap-update-n3e...

https://www.notebookcheck.net/TSMC-reportedly-ditches-its-N3...

Even TSMC is hitting delays and diminishing returns, and costs are spiraling faster than density - N3 alone is ~40% more expensive than N5, both in wafer and validation/tapeout costs, for only ~30% higher density in real-world products. And remember that’s the fake N3 now and the real N3E will undoubtedly be even more expensive.

Rumors are that all 10 of TSMC’s top-10 customers have cut their orders next year and they have 50% less utilization than expected, which is really bad for the node economics. So TSMC may finally have found the point at which costs have spiraled past consumers’ willingness to pay.

https://www.techpowerup.com/302774/top-10-tsmc-customers-sai...

Don't costs for nodes decrease over time?

IE. N7 was much more expensive when it first launched than compared to now? And TSMC prices its wafers based on supply and demand so eventually, N7 will become very cheap.

Also, it's not a surprise that the top 10 TSMC customers have ordered less. It probably has way more to do with a massive inventory of unsold phones and computers, chip glut, and lower projected consumer demand. N3 pricing wouldn't make an impact in 2023.

Yes, but the relative prices may remain the same such that N3 is always more expensive per transistor than N5.

> N3 is actually much worse than expected > ~30% higher density in real-world products

I'm a software guy so excuse my ignorance, but isn't 30% higher density a pretty big deal? Why is N3 worse than expected? Were expectations sky high and expectations weren't hit, or is 30% density increase not as big of a deal as it sounds to me.

I think a lot of people may not understand how density increases relate to performance improvements

It's the combination of density and cost increase that's the problem. I don't have the actual N3 numbers, but taking the original example, if you get 30% increased transistor density, but your cost per area goes up 40%, then as a customer you're not in a great position - you're still paying more per transistor.

While there are still other benefits to gain from a new node and increased density (despite the cost increase), if your cost per transistor goes up, it limits where you might want to use the new node (particularly in value sensitive parts of the market).

There's been a long-term trend towards this point - the cost of a new node (the blend of developing it, implementing a design in it, and cost per transistor) has been spiralling up for like a decade+. These are the same pressures that has caused the consolidation around Intel/TSMC/Samsung(ish) in the bleeding edge.

This is something I think in the next 5 years will become a major thing. Broadly speaking from an OS level, the folks that optimize their software the best will see big benefits. I have advocated (lightly so) to some Linux folks that we should start moving to where the situation will be by the end of the decade. Optimize now before we have too.

The pessimist (AKA Stallman) in me is thinking that vendors like Apple and Microsoft are going to use things like their Security processors to force people to buy new hardware. Software optimizations can potentially keep older hardware going for a lot longer, but by having an arbitrary security chip requirement - folks can be forced to purchase new hardware every few years as older model support is dropped. We are already seeing this in Windows 11.

While we will not have a year of the Linux desktop, the ability for the speed optimizations to be more open to all people could be a sizable win for the platform. Provided the ability to do this isn't locked down.

there was a HN post yesterday about replacing Redux with ChatGPT, so I would have to agree maybe we can all aspire to write slightly leaner software with the massive performance laptops tend to have these days!

Move compute closer to memory.

You mean moving memory closer to compute. And that's happening already in lots of places, even though it brings increased complexity due to having to account for NUMA.

I am thinking long term, as neural nets scale up, we'll have to move compute into memory. The other way around is problematic, small caches don't work well with neural nets. In fact the fastest Transformer (FlashTransformer) is based on principled usage of the SRAM cache because that's the bottleneck.

Bigger L1/L2 caches is definitely another "easy" thing with substantial benefits, but doing it cheaply is hard.

Those caches are SRAM which has not improved much the last few generations.

That's not easy at all because larger caches are slower. A higher hit rate with worse latency can give worse performance. We may see more levels of cache to better optimize the tradeoffs.

Reply on news.ycombinator.com