ARM's popularity also stems from its licensing, AFAICT. You can license various ARM cores, from the tiniest to the beefiest, to include in your SOC or MCU, mix and match them on the die, etc. This is not true for any reasonably recent x86 architecture, either from Intel or from AMD.
See a tiny intro e.g. at https://lwn.net/Articles/718888/
Specifically, Thumb and Thumb2 density was excellent, and remained unbeaten until quite recently (2022, RISC-V B+Zc).
But then aarch64 did, to everyone's surprise, ditch variable instruction size, and with it lost its code density advantage.
Thumb2 was remarkable for getting so close to the performance of regular Arm code, but it was always still slower for almost any task even with the reduced instruction cache pressure.
Aarch64 very much loses out; Microcontrollers are resource-constrained, so they won't use it.
High performance implementations (like Apple's M1) need to work around code density by making caches larger, or even having a microop cache; this all has transistor count cost, which imposes area cost, power cost and maximum clock cost.