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nigerianbrince

It says SHAKTI is an "open source processor" but I cannot find any design docs anywhere.

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https://shakti.org.in/processors.html

See the "learn more" link under each class

I was talking about the verilog code.

Here : https://gitlab.com/shaktiproject/cores/shakti-soc

It's just RISC-V.

"RISC-V has been chosen as the instruction set architecture (ISA) for the SHAKTI class of processors. The SHAKTI processor and systems design is developed using the open source high-level synthesis (HLS) language: Bluespec System Verilog (BSV)."

Yes, but where is the actual Verilog for the cores? At least BlueSec doesn't seem to be a proprietary dialect: https://github.com/B-Lang-org/bsc (BSD License)

https://gitlab.com/shaktiproject/cores/ seems to have all the verilog they published.

If only it were that simple...

(Saying it's "just" RISC-V is like saying the Clang is the same as same as hello world because they're both in C++)

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